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Issue 697663003: [turbofan] Also optimize unsigned division by constant. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Slight improvement Created 6 years, 1 month ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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803 } 803 }
804 804
805 void decb(Register dst); 805 void decb(Register dst);
806 void decb(const Operand& dst); 806 void decb(const Operand& dst);
807 807
808 // Sign-extends rax into rdx:rax. 808 // Sign-extends rax into rdx:rax.
809 void cqo(); 809 void cqo();
810 // Sign-extends eax into edx:eax. 810 // Sign-extends eax into edx:eax.
811 void cdq(); 811 void cdq();
812 812
813 // Multiply eax by src, put the result in edx:eax.
814 void mull(Register src);
815 void mull(const Operand& src);
813 // Multiply rax by src, put the result in rdx:rax. 816 // Multiply rax by src, put the result in rdx:rax.
814 void mul(Register src); 817 void mulq(Register src);
815 818
816 #define DECLARE_SHIFT_INSTRUCTION(instruction, subcode) \ 819 #define DECLARE_SHIFT_INSTRUCTION(instruction, subcode) \
817 void instruction##p(Register dst, Immediate imm8) { \ 820 void instruction##p(Register dst, Immediate imm8) { \
818 shift(dst, imm8, subcode, kPointerSize); \ 821 shift(dst, imm8, subcode, kPointerSize); \
819 } \ 822 } \
820 \ 823 \
821 void instruction##l(Register dst, Immediate imm8) { \ 824 void instruction##l(Register dst, Immediate imm8) { \
822 shift(dst, imm8, subcode, kInt32Size); \ 825 shift(dst, imm8, subcode, kInt32Size); \
823 } \ 826 } \
824 \ 827 \
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1466 1469
1467 // Divide rdx:rax by src. Quotient in rax, remainder in rdx when size is 64. 1470 // Divide rdx:rax by src. Quotient in rax, remainder in rdx when size is 64.
1468 // Divide edx:eax by lower 32 bits of src. Quotient in eax, remainder in edx 1471 // Divide edx:eax by lower 32 bits of src. Quotient in eax, remainder in edx
1469 // when size is 32. 1472 // when size is 32.
1470 void emit_idiv(Register src, int size); 1473 void emit_idiv(Register src, int size);
1471 void emit_div(Register src, int size); 1474 void emit_div(Register src, int size);
1472 1475
1473 // Signed multiply instructions. 1476 // Signed multiply instructions.
1474 // rdx:rax = rax * src when size is 64 or edx:eax = eax * src when size is 32. 1477 // rdx:rax = rax * src when size is 64 or edx:eax = eax * src when size is 32.
1475 void emit_imul(Register src, int size); 1478 void emit_imul(Register src, int size);
1479 void emit_imul(const Operand& src, int size);
1476 void emit_imul(Register dst, Register src, int size); 1480 void emit_imul(Register dst, Register src, int size);
1477 void emit_imul(Register dst, const Operand& src, int size); 1481 void emit_imul(Register dst, const Operand& src, int size);
1478 void emit_imul(Register dst, Register src, Immediate imm, int size); 1482 void emit_imul(Register dst, Register src, Immediate imm, int size);
1479 void emit_imul(Register dst, const Operand& src, Immediate imm, int size); 1483 void emit_imul(Register dst, const Operand& src, Immediate imm, int size);
1480 1484
1481 void emit_inc(Register dst, int size); 1485 void emit_inc(Register dst, int size);
1482 void emit_inc(const Operand& dst, int size); 1486 void emit_inc(const Operand& dst, int size);
1483 1487
1484 void emit_lea(Register dst, const Operand& src, int size); 1488 void emit_lea(Register dst, const Operand& src, int size);
1485 1489
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1620 private: 1624 private:
1621 Assembler* assembler_; 1625 Assembler* assembler_;
1622 #ifdef DEBUG 1626 #ifdef DEBUG
1623 int space_before_; 1627 int space_before_;
1624 #endif 1628 #endif
1625 }; 1629 };
1626 1630
1627 } } // namespace v8::internal 1631 } } // namespace v8::internal
1628 1632
1629 #endif // V8_X64_ASSEMBLER_X64_H_ 1633 #endif // V8_X64_ASSEMBLER_X64_H_
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