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Side by Side Diff: src/compiler/instruction-selector.cc

Issue 697353003: x32: disable turbofan for x32 port (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector.h" 5 #include "src/compiler/instruction-selector.h"
6 6
7 #include "src/compiler/graph.h" 7 #include "src/compiler/graph.h"
8 #include "src/compiler/instruction-selector-impl.h" 8 #include "src/compiler/instruction-selector-impl.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/node-properties-inl.h" 10 #include "src/compiler/node-properties-inl.h"
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826 826
827 827
828 void InstructionSelector::VisitLoadStackPointer(Node* node) { 828 void InstructionSelector::VisitLoadStackPointer(Node* node) {
829 OperandGenerator g(this); 829 OperandGenerator g(this);
830 Emit(kArchStackPointer, g.DefineAsRegister(node)); 830 Emit(kArchStackPointer, g.DefineAsRegister(node));
831 } 831 }
832 832
833 #endif // V8_TURBOFAN_BACKEND 833 #endif // V8_TURBOFAN_BACKEND
834 834
835 // 32 bit targets do not implement the following instructions. 835 // 32 bit targets do not implement the following instructions.
836 #if V8_TARGET_ARCH_32_BIT && V8_TURBOFAN_BACKEND 836 #if V8_TARGET_ARCH_32_BIT && !V8_TARGET_ARCH_X64 && V8_TURBOFAN_BACKEND
837 837
838 void InstructionSelector::VisitWord64And(Node* node) { UNIMPLEMENTED(); } 838 void InstructionSelector::VisitWord64And(Node* node) { UNIMPLEMENTED(); }
839 839
840 840
841 void InstructionSelector::VisitWord64Or(Node* node) { UNIMPLEMENTED(); } 841 void InstructionSelector::VisitWord64Or(Node* node) { UNIMPLEMENTED(); }
842 842
843 843
844 void InstructionSelector::VisitWord64Xor(Node* node) { UNIMPLEMENTED(); } 844 void InstructionSelector::VisitWord64Xor(Node* node) { UNIMPLEMENTED(); }
845 845
846 846
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898 898
899 void InstructionSelector::VisitChangeUint32ToUint64(Node* node) { 899 void InstructionSelector::VisitChangeUint32ToUint64(Node* node) {
900 UNIMPLEMENTED(); 900 UNIMPLEMENTED();
901 } 901 }
902 902
903 903
904 void InstructionSelector::VisitTruncateInt64ToInt32(Node* node) { 904 void InstructionSelector::VisitTruncateInt64ToInt32(Node* node) {
905 UNIMPLEMENTED(); 905 UNIMPLEMENTED();
906 } 906 }
907 907
908 #endif // V8_TARGET_ARCH_32_BIT && V8_TURBOFAN_BACKEND 908 #endif // V8_TARGET_ARCH_32_BIT && !V8_TARGET_ARCH_X64 && V8_TURBOFAN_BACKEND
909 909
910 910
911 void InstructionSelector::VisitFinish(Node* node) { 911 void InstructionSelector::VisitFinish(Node* node) {
912 OperandGenerator g(this); 912 OperandGenerator g(this);
913 Node* value = node->InputAt(0); 913 Node* value = node->InputAt(0);
914 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(value)); 914 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(value));
915 } 915 }
916 916
917 917
918 void InstructionSelector::VisitParameter(Node* node) { 918 void InstructionSelector::VisitParameter(Node* node) {
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1114 MachineOperatorBuilder::Flags 1114 MachineOperatorBuilder::Flags
1115 InstructionSelector::SupportedMachineOperatorFlags() { 1115 InstructionSelector::SupportedMachineOperatorFlags() {
1116 return MachineOperatorBuilder::Flag::kNoFlags; 1116 return MachineOperatorBuilder::Flag::kNoFlags;
1117 } 1117 }
1118 1118
1119 #endif // !V8_TURBOFAN_BACKEND 1119 #endif // !V8_TURBOFAN_BACKEND
1120 1120
1121 } // namespace compiler 1121 } // namespace compiler
1122 } // namespace internal 1122 } // namespace internal
1123 } // namespace v8 1123 } // namespace v8
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