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Side by Side Diff: src/IceTargetLoweringX8632.cpp

Issue 696153002: Subzero: Remove the LEAHACK workarounds. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Add a similar check to stackVarToAsmOperand() Created 6 years, 1 month ago
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1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the TargetLoweringX8632 class, which 10 // This file implements the TargetLoweringX8632 class, which
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502 return RegNames[RegNum]; 502 return RegNames[RegNum];
503 } 503 }
504 } 504 }
505 505
506 void TargetX8632::emitVariable(const Variable *Var) const { 506 void TargetX8632::emitVariable(const Variable *Var) const {
507 Ostream &Str = Ctx->getStrEmit(); 507 Ostream &Str = Ctx->getStrEmit();
508 if (Var->hasReg()) { 508 if (Var->hasReg()) {
509 Str << "%" << getRegName(Var->getRegNum(), Var->getType()); 509 Str << "%" << getRegName(Var->getRegNum(), Var->getType());
510 return; 510 return;
511 } 511 }
512 if (Var->getWeight().isInf())
513 llvm_unreachable("Infinite-weight Variable has no register assigned");
512 const Type Ty = IceType_i32; 514 const Type Ty = IceType_i32;
513 int32_t Offset = Var->getStackOffset(); 515 int32_t Offset = Var->getStackOffset();
514 if (!hasFramePointer()) 516 if (!hasFramePointer())
515 Offset += getStackAdjustment(); 517 Offset += getStackAdjustment();
516 if (Offset) 518 if (Offset)
517 Str << Offset; 519 Str << Offset;
518 Str << "(%" << getRegName(getFrameOrStackReg(), Ty) << ")"; 520 Str << "(%" << getRegName(getFrameOrStackReg(), Ty) << ")";
519 } 521 }
520 522
521 x86::Address TargetX8632::stackVarToAsmOperand(const Variable *Var) const { 523 x86::Address TargetX8632::stackVarToAsmOperand(const Variable *Var) const {
jvoung (off chromium) 2014/11/02 17:37:52 Hmm I was seeing an assert recently building mesa,
Jim Stichnoth 2014/11/02 18:04:28 Yeah, sorry about that... I was always in the habi
522 assert(!Var->hasReg()); 524 if (Var->hasReg())
525 llvm_unreachable("Stack Variable has a register assigned");
526 if (Var->getWeight().isInf())
527 llvm_unreachable("Infinite-weight Variable has no register assigned");
523 int32_t Offset = Var->getStackOffset(); 528 int32_t Offset = Var->getStackOffset();
524 if (!hasFramePointer()) 529 if (!hasFramePointer())
525 Offset += getStackAdjustment(); 530 Offset += getStackAdjustment();
526 return x86::Address(RegX8632::getEncodedGPR(getFrameOrStackReg()), Offset); 531 return x86::Address(RegX8632::getEncodedGPR(getFrameOrStackReg()), Offset);
527 } 532 }
528 533
529 void TargetX8632::lowerArguments() { 534 void TargetX8632::lowerArguments() {
530 VarList &Args = Func->getArgs(); 535 VarList &Args = Func->getArgs();
531 // The first four arguments of vector type, regardless of their 536 // The first four arguments of vector type, regardless of their
532 // position relative to the other arguments in the argument list, are 537 // position relative to the other arguments in the argument list, are
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1843 case IceType_v8i1: 1848 case IceType_v8i1:
1844 case IceType_v16i1: 1849 case IceType_v16i1:
1845 case IceType_v16i8: 1850 case IceType_v16i8:
1846 case IceType_v8i16: 1851 case IceType_v8i16:
1847 case IceType_v4i32: 1852 case IceType_v4i32:
1848 case IceType_v4f32: 1853 case IceType_v4f32:
1849 ReturnReg = makeReg(Dest->getType(), RegX8632::Reg_xmm0); 1854 ReturnReg = makeReg(Dest->getType(), RegX8632::Reg_xmm0);
1850 break; 1855 break;
1851 } 1856 }
1852 } 1857 }
1853 // TODO(stichnot): LEAHACK: remove Legal_All (and use default) once 1858 Operand *CallTarget = legalize(Instr->getCallTarget());
1854 // a proper emitter is used.
1855 Operand *CallTarget = legalize(Instr->getCallTarget(), Legal_All);
1856 Inst *NewCall = InstX8632Call::create(Func, ReturnReg, CallTarget); 1859 Inst *NewCall = InstX8632Call::create(Func, ReturnReg, CallTarget);
1857 Context.insert(NewCall); 1860 Context.insert(NewCall);
1858 if (ReturnRegHi) 1861 if (ReturnRegHi)
1859 Context.insert(InstFakeDef::create(Func, ReturnRegHi)); 1862 Context.insert(InstFakeDef::create(Func, ReturnRegHi));
1860 1863
1861 // Add the appropriate offset to esp. The call instruction takes care 1864 // Add the appropriate offset to esp. The call instruction takes care
1862 // of resetting the stack offset during emission. 1865 // of resetting the stack offset during emission.
1863 if (ParameterAreaSizeBytes) { 1866 if (ParameterAreaSizeBytes) {
1864 Variable *esp = Func->getTarget()->getPhysicalRegister(RegX8632::Reg_esp); 1867 Variable *esp = Func->getTarget()->getPhysicalRegister(RegX8632::Reg_esp);
1865 _add(esp, Ctx->getConstantInt32(IceType_i32, ParameterAreaSizeBytes)); 1868 _add(esp, Ctx->getConstantInt32(IceType_i32, ParameterAreaSizeBytes));
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4400 if (isVectorType(From->getType())) 4403 if (isVectorType(From->getType()))
4401 return makeVectorOfZeros(From->getType(), RegNum); 4404 return makeVectorOfZeros(From->getType(), RegNum);
4402 From = Ctx->getConstantZero(From->getType()); 4405 From = Ctx->getConstantZero(From->getType());
4403 } 4406 }
4404 // There should be no constants of vector type (other than undef). 4407 // There should be no constants of vector type (other than undef).
4405 assert(!isVectorType(From->getType())); 4408 assert(!isVectorType(From->getType()));
4406 bool NeedsReg = false; 4409 bool NeedsReg = false;
4407 if (!(Allowed & Legal_Imm)) 4410 if (!(Allowed & Legal_Imm))
4408 // Immediate specifically not allowed 4411 // Immediate specifically not allowed
4409 NeedsReg = true; 4412 NeedsReg = true;
4410 // TODO(stichnot): LEAHACK: remove Legal_Reloc once a proper
4411 // emitter is used.
4412 if (!(Allowed & Legal_Reloc) && llvm::isa<ConstantRelocatable>(From))
4413 // Relocatable specifically not allowed
4414 NeedsReg = true;
4415 if (!(Allowed & Legal_Mem) && isScalarFloatingType(From->getType())) 4413 if (!(Allowed & Legal_Mem) && isScalarFloatingType(From->getType()))
4416 // On x86, FP constants are lowered to mem operands. 4414 // On x86, FP constants are lowered to mem operands.
4417 NeedsReg = true; 4415 NeedsReg = true;
4418 if (NeedsReg) { 4416 if (NeedsReg) {
4419 From = copyToReg(From, RegNum); 4417 From = copyToReg(From, RegNum);
4420 } 4418 }
4421 return From; 4419 return From;
4422 } 4420 }
4423 if (Variable *Var = llvm::dyn_cast<Variable>(From)) { 4421 if (Variable *Var = llvm::dyn_cast<Variable>(From)) {
4424 // Check if the variable is guaranteed a physical register. This 4422 // Check if the variable is guaranteed a physical register. This
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4702 } else if (IsConstant || IsExternal) 4700 } else if (IsConstant || IsExternal)
4703 Str << "\t.zero\t" << Size << "\n"; 4701 Str << "\t.zero\t" << Size << "\n";
4704 // Size is part of .comm. 4702 // Size is part of .comm.
4705 4703
4706 if (IsConstant || HasNonzeroInitializer || IsExternal) 4704 if (IsConstant || HasNonzeroInitializer || IsExternal)
4707 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; 4705 Str << "\t.size\t" << MangledName << ", " << Size << "\n";
4708 // Size is part of .comm. 4706 // Size is part of .comm.
4709 } 4707 }
4710 4708
4711 } // end of namespace Ice 4709 } // end of namespace Ice
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