tests_lit/llvm2ice_tests/div_legalization.ll - Issue 695993004: Subzero: Switch to AT&T asm syntax. I give up.

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Side by Side Diff: tests_lit/llvm2ice_tests/div_legalization.ll

Issue 695993004: Subzero: Switch to AT&T asm syntax. I give up. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master

Patch Set: Add opcode suffix to xchg. Use .L$ prefix for constant pool entries. Created 6 years, 1 month ago

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1 ; This is a regression test that idiv and div operands are legalized	1 ; This is a regression test that idiv and div operands are legalized

2 ; (they cannot be constants and can only be reg/mem for x86).	2 ; (they cannot be constants and can only be reg/mem for x86).

3	3

4 ; RUN: %p2i -i %s --args -O2 --verbose none \	4 ; RUN: %p2i -i %s --args -O2 --verbose none \

5 ; RUN: \| llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \	5 ; RUN: \| llvm-mc -triple=i686-none-nacl -filetype=obj \

6 ; RUN: \| llvm-objdump -d --symbolize -x86-asm-syntax=intel - \| FileCheck %s	6 ; RUN: \| llvm-objdump -d --symbolize -x86-asm-syntax=intel - \| FileCheck %s

7 ; RUN: %p2i -i %s --args -Om1 --verbose none \	7 ; RUN: %p2i -i %s --args -Om1 --verbose none \

8 ; RUN: \| llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \	8 ; RUN: \| llvm-mc -triple=i686-none-nacl -filetype=obj \

9 ; RUN: \| llvm-objdump -d --symbolize -x86-asm-syntax=intel - \| FileCheck %s	9 ; RUN: \| llvm-objdump -d --symbolize -x86-asm-syntax=intel - \| FileCheck %s

10 ; RUN: %p2i -i %s --args --verbose none \| FileCheck --check-prefix=ERRORS %s	10 ; RUN: %p2i -i %s --args --verbose none \| FileCheck --check-prefix=ERRORS %s

11 ; RUN: %p2i -i %s --insts \| %szdiff %s \| FileCheck --check-prefix=DUMP %s	11 ; RUN: %p2i -i %s --insts \| %szdiff %s \| FileCheck --check-prefix=DUMP %s

12	12

13 define i32 @Sdiv_const8_b(i8 %a) {	13 define i32 @Sdiv_const8_b(i8 %a) {

14 ; CHECK-LABEL: Sdiv_const8_b	14 ; CHECK-LABEL: Sdiv_const8_b

15 entry:	15 entry:

16 %div = sdiv i8 %a, 12	16 %div = sdiv i8 %a, 12

17 ; CHECK: mov {{.*}}, 12	17 ; CHECK: mov {{.*}}, 12

18 ; CHECK-NOT: idiv 12	18 ; CHECK-NOT: idiv 12

(...skipping 42 matching lines...) Expand 10 before \| Expand all \| Expand 10 after Loading...
61 ; CHECK-LABEL: Urem_const_b	61 ; CHECK-LABEL: Urem_const_b

62 entry:	62 entry:

63 %rem = urem i32 %a, 4567	63 %rem = urem i32 %a, 4567

64 ; CHECK: mov {{.*}}, 4567	64 ; CHECK: mov {{.*}}, 4567

65 ; CHECK-NOT: div 4567	65 ; CHECK-NOT: div 4567

66 ret i32 %rem	66 ret i32 %rem

67 }	67 }

68	68

69 ; ERRORS-NOT: ICE translation error	69 ; ERRORS-NOT: ICE translation error

70 ; DUMP-NOT: SZ	70 ; DUMP-NOT: SZ

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