Use compiler barrier instead of memory barrier for release/acquire atomic operations on mac.

src/base/atomicops_internals_mac.h

 // Copyright 2010 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 // This file is an internal atomic implementation, use atomicops.h instead.
 
 #ifndef V8_BASE_ATOMICOPS_INTERNALS_MAC_H_
 #define V8_BASE_ATOMICOPS_INTERNALS_MAC_H_
 
 #include <libkern/OSAtomic.h>
 
 namespace v8 {
 namespace base {
 
+#define ATOMICOPS_COMPILER_BARRIER() __asm__ __volatile__("" : : : "memory")
+
+inline void MemoryBarrier() { OSMemoryBarrier(); }
+
 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
                                          Atomic32 old_value,
                                          Atomic32 new_value) {
   Atomic32 prev_value;
   do {
     if (OSAtomicCompareAndSwap32(old_value, new_value,
                                  const_cast<Atomic32*>(ptr))) {
       return old_value;
     }
     prev_value = *ptr;
@@ skipping 14 matching lines @@
 inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
                                           Atomic32 increment) {
   return OSAtomicAdd32(increment, const_cast<Atomic32*>(ptr));
 }
 
 inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
                                         Atomic32 increment) {
   return OSAtomicAdd32Barrier(increment, const_cast<Atomic32*>(ptr));
 }
 
-inline void MemoryBarrier() {
-  OSMemoryBarrier();
-}
-
 inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
                                        Atomic32 old_value,
                                        Atomic32 new_value) {
   Atomic32 prev_value;
   do {
     if (OSAtomicCompareAndSwap32Barrier(old_value, new_value,
                                         const_cast<Atomic32*>(ptr))) {
       return old_value;
     }
     prev_value = *ptr;
@@ skipping 10 matching lines @@
 inline void NoBarrier_Store(volatile Atomic8* ptr, Atomic8 value) {
   *ptr = value;
 }
 
 inline void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value) {
   *ptr = value;
 }
 
 inline void Acquire_Store(volatile Atomic32* ptr, Atomic32 value) {
   *ptr = value;
-  MemoryBarrier();
+  ATOMICOPS_COMPILER_BARRIER();

[Jarin, 2014/11/05 11:54:53]

I think it is better not to touch anything else than AcquireLoad because the
semantics of that is not completely clear.

[Hannes Payer (out of office), 2014/11/05 12:16:23]

Done. However, I would also change the release stores. WDYT?

 }
 
 inline void Release_Store(volatile Atomic32* ptr, Atomic32 value) {
-  MemoryBarrier();
+  ATOMICOPS_COMPILER_BARRIER();
   *ptr = value;
 }
 
 inline Atomic8 NoBarrier_Load(volatile const Atomic8* ptr) {
   return *ptr;
 }
 
 inline Atomic32 NoBarrier_Load(volatile const Atomic32* ptr) {
   return *ptr;
 }
 
 inline Atomic32 Acquire_Load(volatile const Atomic32* ptr) {
   Atomic32 value = *ptr;
-  MemoryBarrier();
+  ATOMICOPS_COMPILER_BARRIER();

[Jarin, 2014/11/05 11:54:53]

How about just saying here

// On x86 processors, loads already have acquire semantics, so
// there is no need to put a full barrier here.
#if V8_HOST_ARCH_IA32
  ATOMICOPS_COMPILER_BARRIER();
#else  
  MemoryBarrier();
#endif

Or we can introduce an AcquireMemoryBarrier function that would have the #if
ARCH.

[Hannes Payer (out of office), 2014/11/05 12:16:23]

Done.

   return value;
 }
 
 inline Atomic32 Release_Load(volatile const Atomic32* ptr) {
-  MemoryBarrier();
+  ATOMICOPS_COMPILER_BARRIER();
   return *ptr;
 }
 
 #ifdef __LP64__
 
 // 64-bit implementation on 64-bit platform
 
 inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
                                          Atomic64 old_value,
                                          Atomic64 new_value) {
@@ skipping 50 matching lines @@
   // Acquire and Release memory barriers; they are equivalent.
   return Acquire_CompareAndSwap(ptr, old_value, new_value);
 }
 
 inline void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value) {
   *ptr = value;
 }
 
 inline void Acquire_Store(volatile Atomic64* ptr, Atomic64 value) {
   *ptr = value;
-  MemoryBarrier();
+  ATOMICOPS_COMPILER_BARRIER();
 }
 
 inline void Release_Store(volatile Atomic64* ptr, Atomic64 value) {
-  MemoryBarrier();
+  ATOMICOPS_COMPILER_BARRIER();
   *ptr = value;
 }
 
 inline Atomic64 NoBarrier_Load(volatile const Atomic64* ptr) {
   return *ptr;
 }
 
 inline Atomic64 Acquire_Load(volatile const Atomic64* ptr) {
   Atomic64 value = *ptr;
-  MemoryBarrier();
+  ATOMICOPS_COMPILER_BARRIER();

[Jarin, 2014/11/05 11:54:53]

As above, maybe we want

// On x86 processors, loads already have acquire semantics, so
// there is no need to put a full barrier here.
#if V8_HOST_ARCH_X64
  ATOMICOPS_COMPILER_BARRIER();
#else  
  MemoryBarrier();
#endif

[Hannes Payer (out of office), 2014/11/05 12:16:23]

Done.

   return value;
 }
 
 inline Atomic64 Release_Load(volatile const Atomic64* ptr) {
-  MemoryBarrier();
+  ATOMICOPS_COMPILER_BARRIER();
   return *ptr;
 }
 
 #endif  // defined(__LP64__)
 
+#undef ATOMICOPS_COMPILER_BARRIER
 } }  // namespace v8::base
 
 #endif  // V8_BASE_ATOMICOPS_INTERNALS_MAC_H_