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Side by Side Diff: src/compiler/register-allocator.cc

Issue 694313002: [turbofan] add RegisterConfiguration to decouple arch specific register layouts from compiler (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/linkage.h" 5 #include "src/compiler/linkage.h"
6 #include "src/compiler/pipeline-statistics.h" 6 #include "src/compiler/pipeline-statistics.h"
7 #include "src/compiler/register-allocator.h" 7 #include "src/compiler/register-allocator.h"
8 #include "src/macro-assembler.h" // TODO(dcarney): remove this.
9 #include "src/string-stream.h" 8 #include "src/string-stream.h"
10 9
11 namespace v8 { 10 namespace v8 {
12 namespace internal { 11 namespace internal {
13 namespace compiler { 12 namespace compiler {
14 13
15 static inline LifetimePosition Min(LifetimePosition a, LifetimePosition b) { 14 static inline LifetimePosition Min(LifetimePosition a, LifetimePosition b) {
16 return a.Value() < b.Value() ? a : b; 15 return a.Value() < b.Value() ? a : b;
17 } 16 }
18 17
(...skipping 481 matching lines...) Expand 10 before | Expand all | Expand 10 after
500 if (a == NULL || a->start().Value() > other->End().Value()) break; 499 if (a == NULL || a->start().Value() > other->End().Value()) break;
501 AdvanceLastProcessedMarker(a, advance_last_processed_up_to); 500 AdvanceLastProcessedMarker(a, advance_last_processed_up_to);
502 } else { 501 } else {
503 b = b->next(); 502 b = b->next();
504 } 503 }
505 } 504 }
506 return LifetimePosition::Invalid(); 505 return LifetimePosition::Invalid();
507 } 506 }
508 507
509 508
510 RegisterAllocator::Config RegisterAllocator::PlatformConfig() { 509 RegisterAllocator::RegisterAllocator(const RegisterConfiguration* config,
511 DCHECK_EQ(Register::kMaxNumAllocatableRegisters, 510 Zone* local_zone, Frame* frame,
512 Register::NumAllocatableRegisters()); 511 InstructionSequence* code,
513 Config config;
514 config.num_general_registers_ = Register::kMaxNumAllocatableRegisters;
515 config.num_double_registers_ = DoubleRegister::kMaxNumAllocatableRegisters;
516 config.num_aliased_double_registers_ =
517 DoubleRegister::NumAllocatableAliasedRegisters();
518 config.GeneralRegisterName = Register::AllocationIndexToString;
519 config.DoubleRegisterName = DoubleRegister::AllocationIndexToString;
520 return config;
521 }
522
523
524 RegisterAllocator::RegisterAllocator(const Config& config, Zone* local_zone,
525 Frame* frame, InstructionSequence* code,
526 const char* debug_name) 512 const char* debug_name)
527 : zone_(local_zone), 513 : zone_(local_zone),
528 frame_(frame), 514 frame_(frame),
529 code_(code), 515 code_(code),
530 debug_name_(debug_name), 516 debug_name_(debug_name),
531 config_(config), 517 config_(config),
532 live_in_sets_(code->InstructionBlockCount(), zone()), 518 live_in_sets_(code->InstructionBlockCount(), zone()),
533 live_ranges_(code->VirtualRegisterCount() * 2, zone()), 519 live_ranges_(code->VirtualRegisterCount() * 2, zone()),
534 fixed_live_ranges_(this->config().num_general_registers_, NULL, zone()), 520 fixed_live_ranges_(this->config()->num_general_registers(), NULL, zone()),
535 fixed_double_live_ranges_(this->config().num_double_registers_, NULL, 521 fixed_double_live_ranges_(this->config()->num_double_registers(), NULL,
536 zone()), 522 zone()),
537 unhandled_live_ranges_(code->VirtualRegisterCount() * 2, zone()), 523 unhandled_live_ranges_(code->VirtualRegisterCount() * 2, zone()),
538 active_live_ranges_(8, zone()), 524 active_live_ranges_(8, zone()),
539 inactive_live_ranges_(8, zone()), 525 inactive_live_ranges_(8, zone()),
540 reusable_slots_(8, zone()), 526 reusable_slots_(8, zone()),
541 mode_(UNALLOCATED_REGISTERS), 527 mode_(UNALLOCATED_REGISTERS),
542 num_registers_(-1), 528 num_registers_(-1),
543 allocation_ok_(true) { 529 allocation_ok_(true) {
544 DCHECK(this->config().num_general_registers_ <= kMaxGeneralRegisters); 530 DCHECK(this->config()->num_general_registers() <=
545 DCHECK(this->config().num_double_registers_ <= kMaxDoubleRegisters); 531 RegisterConfiguration::kMaxGeneralRegisters);
532 DCHECK(this->config()->num_double_registers() <=
533 RegisterConfiguration::kMaxDoubleRegisters);
546 // TryAllocateFreeReg and AllocateBlockedReg assume this 534 // TryAllocateFreeReg and AllocateBlockedReg assume this
547 // when allocating local arrays. 535 // when allocating local arrays.
548 DCHECK(this->config().num_double_registers_ >= 536 DCHECK(this->config()->num_double_registers() >=
549 this->config().num_general_registers_); 537 this->config()->num_general_registers());
550 } 538 }
551 539
552 540
553 void RegisterAllocator::InitializeLivenessAnalysis() { 541 void RegisterAllocator::InitializeLivenessAnalysis() {
554 // Initialize the live_in sets for each block to NULL. 542 // Initialize the live_in sets for each block to NULL.
555 int block_count = code()->InstructionBlockCount(); 543 int block_count = code()->InstructionBlockCount();
556 live_in_sets_.Initialize(block_count, zone()); 544 live_in_sets_.Initialize(block_count, zone());
557 live_in_sets_.AddBlock(NULL, block_count, zone()); 545 live_in_sets_.AddBlock(NULL, block_count, zone());
558 } 546 }
559 547
(...skipping 36 matching lines...) Expand 10 before | Expand all | Expand 10 after
596 while (!iterator.Done()) { 584 while (!iterator.Done()) {
597 int operand_index = iterator.Current(); 585 int operand_index = iterator.Current();
598 LiveRange* range = LiveRangeFor(operand_index); 586 LiveRange* range = LiveRangeFor(operand_index);
599 range->AddUseInterval(start, end, zone()); 587 range->AddUseInterval(start, end, zone());
600 iterator.Advance(); 588 iterator.Advance();
601 } 589 }
602 } 590 }
603 591
604 592
605 int RegisterAllocator::FixedDoubleLiveRangeID(int index) { 593 int RegisterAllocator::FixedDoubleLiveRangeID(int index) {
606 return -index - 1 - config().num_general_registers_; 594 return -index - 1 - config()->num_general_registers();
607 } 595 }
608 596
609 597
610 InstructionOperand* RegisterAllocator::AllocateFixed( 598 InstructionOperand* RegisterAllocator::AllocateFixed(
611 UnallocatedOperand* operand, int pos, bool is_tagged) { 599 UnallocatedOperand* operand, int pos, bool is_tagged) {
612 TraceAlloc("Allocating fixed reg for op %d\n", operand->virtual_register()); 600 TraceAlloc("Allocating fixed reg for op %d\n", operand->virtual_register());
613 DCHECK(operand->HasFixedPolicy()); 601 DCHECK(operand->HasFixedPolicy());
614 if (operand->HasFixedSlotPolicy()) { 602 if (operand->HasFixedSlotPolicy()) {
615 operand->ConvertTo(InstructionOperand::STACK_SLOT, 603 operand->ConvertTo(InstructionOperand::STACK_SLOT,
616 operand->fixed_slot_index()); 604 operand->fixed_slot_index());
(...skipping 11 matching lines...) Expand all
628 Instruction* instr = InstructionAt(pos); 616 Instruction* instr = InstructionAt(pos);
629 if (instr->HasPointerMap()) { 617 if (instr->HasPointerMap()) {
630 instr->pointer_map()->RecordPointer(operand, code_zone()); 618 instr->pointer_map()->RecordPointer(operand, code_zone());
631 } 619 }
632 } 620 }
633 return operand; 621 return operand;
634 } 622 }
635 623
636 624
637 LiveRange* RegisterAllocator::FixedLiveRangeFor(int index) { 625 LiveRange* RegisterAllocator::FixedLiveRangeFor(int index) {
638 DCHECK(index < config().num_general_registers_); 626 DCHECK(index < config()->num_general_registers());
639 LiveRange* result = fixed_live_ranges_[index]; 627 LiveRange* result = fixed_live_ranges_[index];
640 if (result == NULL) { 628 if (result == NULL) {
641 // TODO(titzer): add a utility method to allocate a new LiveRange: 629 // TODO(titzer): add a utility method to allocate a new LiveRange:
642 // The LiveRange object itself can go in this zone, but the 630 // The LiveRange object itself can go in this zone, but the
643 // InstructionOperand needs 631 // InstructionOperand needs
644 // to go in the code zone, since it may survive register allocation. 632 // to go in the code zone, since it may survive register allocation.
645 result = new (zone()) LiveRange(FixedLiveRangeID(index), code_zone()); 633 result = new (zone()) LiveRange(FixedLiveRangeID(index), code_zone());
646 DCHECK(result->IsFixed()); 634 DCHECK(result->IsFixed());
647 result->kind_ = GENERAL_REGISTERS; 635 result->kind_ = GENERAL_REGISTERS;
648 SetLiveRangeAssignedRegister(result, index); 636 SetLiveRangeAssignedRegister(result, index);
649 fixed_live_ranges_[index] = result; 637 fixed_live_ranges_[index] = result;
650 } 638 }
651 return result; 639 return result;
652 } 640 }
653 641
654 642
655 LiveRange* RegisterAllocator::FixedDoubleLiveRangeFor(int index) { 643 LiveRange* RegisterAllocator::FixedDoubleLiveRangeFor(int index) {
656 DCHECK(index < config().num_aliased_double_registers_); 644 DCHECK(index < config()->num_aliased_double_registers());
657 LiveRange* result = fixed_double_live_ranges_[index]; 645 LiveRange* result = fixed_double_live_ranges_[index];
658 if (result == NULL) { 646 if (result == NULL) {
659 result = new (zone()) LiveRange(FixedDoubleLiveRangeID(index), code_zone()); 647 result = new (zone()) LiveRange(FixedDoubleLiveRangeID(index), code_zone());
660 DCHECK(result->IsFixed()); 648 DCHECK(result->IsFixed());
661 result->kind_ = DOUBLE_REGISTERS; 649 result->kind_ = DOUBLE_REGISTERS;
662 SetLiveRangeAssignedRegister(result, index); 650 SetLiveRangeAssignedRegister(result, index);
663 fixed_double_live_ranges_[index] = result; 651 fixed_double_live_ranges_[index] = result;
664 } 652 }
665 return result; 653 return result;
666 } 654 }
(...skipping 357 matching lines...) Expand 10 before | Expand all | Expand 10 after
1024 int out_vreg = UnallocatedOperand::cast(output)->virtual_register(); 1012 int out_vreg = UnallocatedOperand::cast(output)->virtual_register();
1025 live->Remove(out_vreg); 1013 live->Remove(out_vreg);
1026 } else if (output->IsConstant()) { 1014 } else if (output->IsConstant()) {
1027 int out_vreg = output->index(); 1015 int out_vreg = output->index();
1028 live->Remove(out_vreg); 1016 live->Remove(out_vreg);
1029 } 1017 }
1030 Define(curr_position, output, NULL); 1018 Define(curr_position, output, NULL);
1031 } 1019 }
1032 1020
1033 if (instr->ClobbersRegisters()) { 1021 if (instr->ClobbersRegisters()) {
1034 for (int i = 0; i < config().num_general_registers_; ++i) { 1022 for (int i = 0; i < config()->num_general_registers(); ++i) {
1035 if (!IsOutputRegisterOf(instr, i)) { 1023 if (!IsOutputRegisterOf(instr, i)) {
1036 LiveRange* range = FixedLiveRangeFor(i); 1024 LiveRange* range = FixedLiveRangeFor(i);
1037 range->AddUseInterval(curr_position, curr_position.InstructionEnd(), 1025 range->AddUseInterval(curr_position, curr_position.InstructionEnd(),
1038 zone()); 1026 zone());
1039 } 1027 }
1040 } 1028 }
1041 } 1029 }
1042 1030
1043 if (instr->ClobbersDoubleRegisters()) { 1031 if (instr->ClobbersDoubleRegisters()) {
1044 for (int i = 0; i < config().num_aliased_double_registers_; ++i) { 1032 for (int i = 0; i < config()->num_aliased_double_registers(); ++i) {
1045 if (!IsOutputDoubleRegisterOf(instr, i)) { 1033 if (!IsOutputDoubleRegisterOf(instr, i)) {
1046 LiveRange* range = FixedDoubleLiveRangeFor(i); 1034 LiveRange* range = FixedDoubleLiveRangeFor(i);
1047 range->AddUseInterval(curr_position, curr_position.InstructionEnd(), 1035 range->AddUseInterval(curr_position, curr_position.InstructionEnd(),
1048 zone()); 1036 zone());
1049 } 1037 }
1050 } 1038 }
1051 } 1039 }
1052 1040
1053 for (size_t i = 0; i < instr->InputCount(); i++) { 1041 for (size_t i = 0; i < instr->InputCount(); i++) {
1054 InstructionOperand* input = instr->InputAt(i); 1042 InstructionOperand* input = instr->InputAt(i);
(...skipping 64 matching lines...) Expand 10 before | Expand all | Expand 10 after
1119 // We use the phi-ness of some nodes in some later heuristics. 1107 // We use the phi-ness of some nodes in some later heuristics.
1120 live_range->set_is_phi(true); 1108 live_range->set_is_phi(true);
1121 if (!block->IsLoopHeader()) { 1109 if (!block->IsLoopHeader()) {
1122 live_range->set_is_non_loop_phi(true); 1110 live_range->set_is_non_loop_phi(true);
1123 } 1111 }
1124 } 1112 }
1125 } 1113 }
1126 1114
1127 1115
1128 bool RegisterAllocator::Allocate(PipelineStatistics* stats) { 1116 bool RegisterAllocator::Allocate(PipelineStatistics* stats) {
1129 assigned_registers_ = 1117 assigned_registers_ = new (code_zone())
1130 new (code_zone()) BitVector(config().num_general_registers_, code_zone()); 1118 BitVector(config()->num_general_registers(), code_zone());
1131 assigned_double_registers_ = new (code_zone()) 1119 assigned_double_registers_ = new (code_zone())
1132 BitVector(config().num_aliased_double_registers_, code_zone()); 1120 BitVector(config()->num_aliased_double_registers(), code_zone());
1133 { 1121 {
1134 PhaseScope phase_scope(stats, "meet register constraints"); 1122 PhaseScope phase_scope(stats, "meet register constraints");
1135 MeetRegisterConstraints(); 1123 MeetRegisterConstraints();
1136 } 1124 }
1137 if (!AllocationOk()) return false; 1125 if (!AllocationOk()) return false;
1138 { 1126 {
1139 PhaseScope phase_scope(stats, "resolve phis"); 1127 PhaseScope phase_scope(stats, "resolve phis");
1140 ResolvePhis(); 1128 ResolvePhis();
1141 } 1129 }
1142 { 1130 {
(...skipping 385 matching lines...) Expand 10 before | Expand all | Expand 10 after
1528 InstructionOperand* operand = cur->CreateAssignedOperand(code_zone()); 1516 InstructionOperand* operand = cur->CreateAssignedOperand(code_zone());
1529 DCHECK(!operand->IsStackSlot()); 1517 DCHECK(!operand->IsStackSlot());
1530 map->RecordPointer(operand, code_zone()); 1518 map->RecordPointer(operand, code_zone());
1531 } 1519 }
1532 } 1520 }
1533 } 1521 }
1534 } 1522 }
1535 1523
1536 1524
1537 void RegisterAllocator::AllocateGeneralRegisters() { 1525 void RegisterAllocator::AllocateGeneralRegisters() {
1538 num_registers_ = config().num_general_registers_; 1526 num_registers_ = config()->num_general_registers();
1539 mode_ = GENERAL_REGISTERS; 1527 mode_ = GENERAL_REGISTERS;
1540 AllocateRegisters(); 1528 AllocateRegisters();
1541 } 1529 }
1542 1530
1543 1531
1544 void RegisterAllocator::AllocateDoubleRegisters() { 1532 void RegisterAllocator::AllocateDoubleRegisters() {
1545 num_registers_ = config().num_aliased_double_registers_; 1533 num_registers_ = config()->num_aliased_double_registers();
1546 mode_ = DOUBLE_REGISTERS; 1534 mode_ = DOUBLE_REGISTERS;
1547 AllocateRegisters(); 1535 AllocateRegisters();
1548 } 1536 }
1549 1537
1550 1538
1551 void RegisterAllocator::AllocateRegisters() { 1539 void RegisterAllocator::AllocateRegisters() {
1552 DCHECK(unhandled_live_ranges_.is_empty()); 1540 DCHECK(unhandled_live_ranges_.is_empty());
1553 1541
1554 for (int i = 0; i < live_ranges_.length(); ++i) { 1542 for (int i = 0; i < live_ranges_.length(); ++i) {
1555 if (live_ranges_[i] != NULL) { 1543 if (live_ranges_[i] != NULL) {
1556 if (live_ranges_[i]->Kind() == mode_) { 1544 if (live_ranges_[i]->Kind() == mode_) {
1557 AddToUnhandledUnsorted(live_ranges_[i]); 1545 AddToUnhandledUnsorted(live_ranges_[i]);
1558 } 1546 }
1559 } 1547 }
1560 } 1548 }
1561 SortUnhandled(); 1549 SortUnhandled();
1562 DCHECK(UnhandledIsSorted()); 1550 DCHECK(UnhandledIsSorted());
1563 1551
1564 DCHECK(reusable_slots_.is_empty()); 1552 DCHECK(reusable_slots_.is_empty());
1565 DCHECK(active_live_ranges_.is_empty()); 1553 DCHECK(active_live_ranges_.is_empty());
1566 DCHECK(inactive_live_ranges_.is_empty()); 1554 DCHECK(inactive_live_ranges_.is_empty());
1567 1555
1568 if (mode_ == DOUBLE_REGISTERS) { 1556 if (mode_ == DOUBLE_REGISTERS) {
1569 for (int i = 0; i < config().num_aliased_double_registers_; ++i) { 1557 for (int i = 0; i < config()->num_aliased_double_registers(); ++i) {
1570 LiveRange* current = fixed_double_live_ranges_.at(i); 1558 LiveRange* current = fixed_double_live_ranges_.at(i);
1571 if (current != NULL) { 1559 if (current != NULL) {
1572 AddToInactive(current); 1560 AddToInactive(current);
1573 } 1561 }
1574 } 1562 }
1575 } else { 1563 } else {
1576 DCHECK(mode_ == GENERAL_REGISTERS); 1564 DCHECK(mode_ == GENERAL_REGISTERS);
1577 for (auto current : fixed_live_ranges()) { 1565 for (auto current : fixed_live_ranges()) {
1578 if (current != NULL) { 1566 if (current != NULL) {
1579 AddToInactive(current); 1567 AddToInactive(current);
(...skipping 71 matching lines...) Expand 10 before | Expand all | Expand 10 after
1651 } 1639 }
1652 1640
1653 reusable_slots_.Rewind(0); 1641 reusable_slots_.Rewind(0);
1654 active_live_ranges_.Rewind(0); 1642 active_live_ranges_.Rewind(0);
1655 inactive_live_ranges_.Rewind(0); 1643 inactive_live_ranges_.Rewind(0);
1656 } 1644 }
1657 1645
1658 1646
1659 const char* RegisterAllocator::RegisterName(int allocation_index) { 1647 const char* RegisterAllocator::RegisterName(int allocation_index) {
1660 if (mode_ == GENERAL_REGISTERS) { 1648 if (mode_ == GENERAL_REGISTERS) {
1661 return config().GeneralRegisterName(allocation_index); 1649 return config()->general_register_name(allocation_index);
1662 } else { 1650 } else {
1663 return config().DoubleRegisterName(allocation_index); 1651 return config()->double_register_name(allocation_index);
1664 } 1652 }
1665 } 1653 }
1666 1654
1667 1655
1668 bool RegisterAllocator::HasTaggedValue(int virtual_register) const { 1656 bool RegisterAllocator::HasTaggedValue(int virtual_register) const {
1669 return code()->IsReference(virtual_register); 1657 return code()->IsReference(virtual_register);
1670 } 1658 }
1671 1659
1672 1660
1673 RegisterKind RegisterAllocator::RequiredRegisterKind( 1661 RegisterKind RegisterAllocator::RequiredRegisterKind(
(...skipping 124 matching lines...) Expand 10 before | Expand all | Expand 10 after
1798 1786
1799 void RegisterAllocator::InactiveToActive(LiveRange* range) { 1787 void RegisterAllocator::InactiveToActive(LiveRange* range) {
1800 DCHECK(inactive_live_ranges_.Contains(range)); 1788 DCHECK(inactive_live_ranges_.Contains(range));
1801 inactive_live_ranges_.RemoveElement(range); 1789 inactive_live_ranges_.RemoveElement(range);
1802 active_live_ranges_.Add(range, zone()); 1790 active_live_ranges_.Add(range, zone());
1803 TraceAlloc("Moving live range %d from inactive to active\n", range->id()); 1791 TraceAlloc("Moving live range %d from inactive to active\n", range->id());
1804 } 1792 }
1805 1793
1806 1794
1807 bool RegisterAllocator::TryAllocateFreeReg(LiveRange* current) { 1795 bool RegisterAllocator::TryAllocateFreeReg(LiveRange* current) {
1808 LifetimePosition free_until_pos[kMaxDoubleRegisters]; 1796 LifetimePosition free_until_pos[RegisterConfiguration::kMaxDoubleRegisters];
1809 1797
1810 for (int i = 0; i < num_registers_; i++) { 1798 for (int i = 0; i < num_registers_; i++) {
1811 free_until_pos[i] = LifetimePosition::MaxPosition(); 1799 free_until_pos[i] = LifetimePosition::MaxPosition();
1812 } 1800 }
1813 1801
1814 for (int i = 0; i < active_live_ranges_.length(); ++i) { 1802 for (int i = 0; i < active_live_ranges_.length(); ++i) {
1815 LiveRange* cur_active = active_live_ranges_.at(i); 1803 LiveRange* cur_active = active_live_ranges_.at(i);
1816 free_until_pos[cur_active->assigned_register()] = 1804 free_until_pos[cur_active->assigned_register()] =
1817 LifetimePosition::FromInstructionIndex(0); 1805 LifetimePosition::FromInstructionIndex(0);
1818 } 1806 }
(...skipping 62 matching lines...) Expand 10 before | Expand all | Expand 10 after
1881 1869
1882 void RegisterAllocator::AllocateBlockedReg(LiveRange* current) { 1870 void RegisterAllocator::AllocateBlockedReg(LiveRange* current) {
1883 UsePosition* register_use = current->NextRegisterPosition(current->Start()); 1871 UsePosition* register_use = current->NextRegisterPosition(current->Start());
1884 if (register_use == NULL) { 1872 if (register_use == NULL) {
1885 // There is no use in the current live range that requires a register. 1873 // There is no use in the current live range that requires a register.
1886 // We can just spill it. 1874 // We can just spill it.
1887 Spill(current); 1875 Spill(current);
1888 return; 1876 return;
1889 } 1877 }
1890 1878
1891 LifetimePosition use_pos[kMaxGeneralRegisters]; 1879 LifetimePosition use_pos[RegisterConfiguration::kMaxGeneralRegisters];
1892 LifetimePosition block_pos[kMaxDoubleRegisters]; 1880 LifetimePosition block_pos[RegisterConfiguration::kMaxDoubleRegisters];
1893 1881
1894 for (int i = 0; i < num_registers_; i++) { 1882 for (int i = 0; i < num_registers_; i++) {
1895 use_pos[i] = block_pos[i] = LifetimePosition::MaxPosition(); 1883 use_pos[i] = block_pos[i] = LifetimePosition::MaxPosition();
1896 } 1884 }
1897 1885
1898 for (int i = 0; i < active_live_ranges_.length(); ++i) { 1886 for (int i = 0; i < active_live_ranges_.length(); ++i) {
1899 LiveRange* range = active_live_ranges_[i]; 1887 LiveRange* range = active_live_ranges_[i];
1900 int cur_reg = range->assigned_register(); 1888 int cur_reg = range->assigned_register();
1901 if (range->IsFixed() || !range->CanBeSpilled(current->Start())) { 1889 if (range->IsFixed() || !range->CanBeSpilled(current->Start())) {
1902 block_pos[cur_reg] = use_pos[cur_reg] = 1890 block_pos[cur_reg] = use_pos[cur_reg] =
(...skipping 315 matching lines...) Expand 10 before | Expand all | Expand 10 after
2218 } else { 2206 } else {
2219 DCHECK(range->Kind() == GENERAL_REGISTERS); 2207 DCHECK(range->Kind() == GENERAL_REGISTERS);
2220 assigned_registers_->Add(reg); 2208 assigned_registers_->Add(reg);
2221 } 2209 }
2222 range->set_assigned_register(reg, code_zone()); 2210 range->set_assigned_register(reg, code_zone());
2223 } 2211 }
2224 2212
2225 } 2213 }
2226 } 2214 }
2227 } // namespace v8::internal::compiler 2215 } // namespace v8::internal::compiler
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