Turn off dump/emit routines when building minimal subzero.

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 325 matching lines @@
 
 InstX8632Xchg::InstX8632Xchg(Cfg *Func, Operand *Dest, Variable *Source)
     : InstX8632(Func, InstX8632::Xchg, 2, llvm::dyn_cast<Variable>(Dest)) {
   addSource(Dest);
   addSource(Source);
 }
 
 // ======================== Dump routines ======================== //
 
 void InstX8632::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "[X8632] ";
   Inst::dump(Func);
 }
 
 void InstX8632Label::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << getName(Func) << ":";
 }
 
 void InstX8632Label::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   Asm->BindLocalLabel(Number);
 }
 
 void InstX8632Label::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << getName(Func) << ":";
 }
 
 void InstX8632Br::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\t";
 
   if (Condition == CondX86::Br_None) {
     Str << "jmp";
   } else {
     Str << InstX8632BrAttributes[Condition].EmitString;
   }
 
   if (Label) {
@@ skipping 36 matching lines @@
       if (getTargetFalse()) {
         x86::Label *L2 =
             Asm->GetOrCreateCfgNodeLabel(getTargetFalse()->getIndex());
         Asm->jmp(L2, Near);
       }
     }
   }
 }
 
 void InstX8632Br::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "br ";
 
   if (Condition == CondX86::Br_None) {
     Str << "label %"
         << (Label ? Label->getName(Func) : getTargetFalse()->getName());
     return;
   }
 
   Str << InstX8632BrAttributes[Condition].DisplayString;
   if (Label) {
     Str << ", label %" << Label->getName(Func);
   } else {
     Str << ", label %" << getTargetTrue()->getName();
     if (getTargetFalse()) {
       Str << ", label %" << getTargetFalse()->getName();
     }
   }
 }
 
 void InstX8632Call::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tcall\t";
   if (const auto CallTarget =
           llvm::dyn_cast<ConstantRelocatable>(getCallTarget())) {
     // TODO(stichnot): All constant targets should suppress the '$',
     // not just relocatables.
     CallTarget->emitWithoutDollar(Func->getContext());
   } else {
     Str << "*";
@@ skipping 28 matching lines @@
     // TODO(jvoung): Do we need to support this?
     (void)Imm;
     llvm_unreachable("Unexpected call to absolute address");
   } else {
     llvm_unreachable("Unexpected operand type");
   }
   Func->getTarget()->resetStackAdjustment();
 }
 
 void InstX8632Call::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   if (getDest()) {
     dumpDest(Func);
     Str << " = ";
   }
   Str << "call ";
   getCallTarget()->dump(Func);
 }
 
 // The ShiftHack parameter is used to emit "cl" instead of "ecx" for
 // shift instructions, in order to be syntactically valid.  The
 // Opcode parameter needs to be char* and not IceString because of
 // template issues.
 void emitTwoAddress(const char *Opcode, const Inst *Inst, const Cfg *Func,
                     bool ShiftHack) {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(Inst->getSrcSize() == 2);
   Variable *Dest = Inst->getDest();
   assert(Dest == Inst->getSrc(0));
   Operand *Src1 = Inst->getSrc(1);
   Str << "\t" << Opcode << InstX8632::getWidthString(Dest->getType()) << "\t";
   const auto ShiftReg = llvm::dyn_cast<Variable>(Src1);
   if (ShiftHack && ShiftReg && ShiftReg->getRegNum() == RegX8632::Reg_ecx)
     Str << "%cl";
   else
@@ skipping 512 matching lines @@
 template <>
 const x86::AssemblerX86::XmmEmitterShiftOp InstX8632Psll::Emitter = {
     &x86::AssemblerX86::psll, &x86::AssemblerX86::psll,
     &x86::AssemblerX86::psll};
 template <>
 const x86::AssemblerX86::XmmEmitterShiftOp InstX8632Psra::Emitter = {
     &x86::AssemblerX86::psra, &x86::AssemblerX86::psra,
     &x86::AssemblerX86::psra};
 
 template <> void InstX8632Sqrtss::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Type Ty = getSrc(0)->getType();
   assert(isScalarFloatingType(Ty));
   Str << "\tsqrt" << TypeX8632Attributes[Ty].SdSsString << "\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getDest()->emit(Func);
 }
 
 template <> void InstX8632Addss::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "add%s",
            TypeX8632Attributes[getDest()->getType()].SdSsString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Padd::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "padd%s",
            TypeX8632Attributes[getDest()->getType()].PackString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Pmull::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   char buf[30];
   bool TypesAreValid = getDest()->getType() == IceType_v4i32 ||
                        getDest()->getType() == IceType_v8i16;
   bool InstructionSetIsValid =
       getDest()->getType() == IceType_v8i16 ||
       static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
           TargetX8632::SSE4_1;
   (void)TypesAreValid;
   (void)InstructionSetIsValid;
   assert(TypesAreValid);
@@ skipping 13 matching lines @@
   (void)TypesAreValid;
   (void)InstructionSetIsValid;
   assert(TypesAreValid);
   assert(InstructionSetIsValid);
   assert(getSrcSize() == 2);
   Type ElementTy = typeElementType(Ty);
   emitIASRegOpTyXMM(Func, ElementTy, getDest(), getSrc(1), Emitter);
 }
 
 template <> void InstX8632Subss::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "sub%s",
            TypeX8632Attributes[getDest()->getType()].SdSsString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Psub::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "psub%s",
            TypeX8632Attributes[getDest()->getType()].PackString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Mulss::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "mul%s",
            TypeX8632Attributes[getDest()->getType()].SdSsString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Pmuludq::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   assert(getSrc(0)->getType() == IceType_v4i32 &&
          getSrc(1)->getType() == IceType_v4i32);
   emitTwoAddress(Opcode, this, Func);
 }
 
 template <> void InstX8632Divss::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "div%s",
            TypeX8632Attributes[getDest()->getType()].SdSsString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Div::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   Operand *Src1 = getSrc(1);
   Str << "\t" << Opcode << getWidthString(Src1->getType()) << "\t";
   Src1->emit(Func);
 }
 
 template <> void InstX8632Div::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 3);
   const Operand *Src = getSrc(1);
   Type Ty = Src->getType();
   const static x86::AssemblerX86::GPREmitterOneOp Emitter = {
       &x86::AssemblerX86::div, &x86::AssemblerX86::div};
   emitIASOpTyGPR(Func, Ty, Src, Emitter);
 }
 
 template <> void InstX8632Idiv::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   Operand *Src1 = getSrc(1);
   Str << "\t" << Opcode << getWidthString(Src1->getType()) << "\t";
   Src1->emit(Func);
 }
 
 template <> void InstX8632Idiv::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 3);
   const Operand *Src = getSrc(1);
   Type Ty = Src->getType();
   const static x86::AssemblerX86::GPREmitterOneOp Emitter = {
       &x86::AssemblerX86::idiv, &x86::AssemblerX86::idiv};
   emitIASOpTyGPR(Func, Ty, Src, Emitter);
 }
 
 namespace {
 
 // pblendvb and blendvps take xmm0 as a final implicit argument.
 void emitVariableBlendInst(const char *Opcode, const Inst *Inst,
                            const Cfg *Func) {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(Inst->getSrcSize() == 3);
   assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() ==
          RegX8632::Reg_xmm0);
   Str << "\t" << Opcode << "\t";
   Inst->getSrc(1)->emit(Func);
   Str << ", ";
   Inst->getDest()->emit(Func);
 }
 
 void
 emitIASVariableBlendInst(const Inst *Inst, const Cfg *Func,
                          const x86::AssemblerX86::XmmEmitterRegOp &Emitter) {
   assert(Inst->getSrcSize() == 3);
   assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() ==
          RegX8632::Reg_xmm0);
   const Variable *Dest = Inst->getDest();
   const Operand *Src = Inst->getSrc(1);
   emitIASRegOpTyXMM(Func, Dest->getType(), Dest, Src, Emitter);
 }
 
 } // end anonymous namespace
 
 template <> void InstX8632Blendvps::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
          TargetX8632::SSE4_1);
   emitVariableBlendInst(Opcode, this, Func);
 }
 
 template <> void InstX8632Blendvps::emitIAS(const Cfg *Func) const {
   assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
          TargetX8632::SSE4_1);
   static const x86::AssemblerX86::XmmEmitterRegOp Emitter = {
       &x86::AssemblerX86::blendvps, &x86::AssemblerX86::blendvps};
   emitIASVariableBlendInst(this, Func, Emitter);
 }
 
 template <> void InstX8632Pblendvb::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
          TargetX8632::SSE4_1);
   emitVariableBlendInst(Opcode, this, Func);
 }
 
 template <> void InstX8632Pblendvb::emitIAS(const Cfg *Func) const {
   assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
          TargetX8632::SSE4_1);
   static const x86::AssemblerX86::XmmEmitterRegOp Emitter = {
       &x86::AssemblerX86::pblendvb, &x86::AssemblerX86::pblendvb};
   emitIASVariableBlendInst(this, Func, Emitter);
 }
 
 template <> void InstX8632Imul::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Variable *Dest = getDest();
   if (isByteSizedArithType(Dest->getType())) {
     // The 8-bit version of imul only allows the form "imul r/m8".
     const auto Src0Var = llvm::dyn_cast<Variable>(getSrc(0));
     (void)Src0Var;
     assert(Src0Var && Src0Var->getRegNum() == RegX8632::Reg_eax);
     Str << "\timulb\t";
     getSrc(1)->emit(Func);
@@ skipping 42 matching lines @@
   Type Ty = Dest->getType();
   static const x86::AssemblerX86::ThreeOpImmEmitter<
       RegX8632::XmmRegister, RegX8632::XmmRegister> Emitter = {
       &x86::AssemblerX86::insertps, &x86::AssemblerX86::insertps};
   emitIASThreeOpImmOps<RegX8632::XmmRegister, RegX8632::XmmRegister,
                        RegX8632::getEncodedXmm, RegX8632::getEncodedXmm>(
       Func, Ty, Dest, getSrc(1), getSrc(2), Emitter);
 }
 
 template <> void InstX8632Cbwdq::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Operand *Src0 = getSrc(0);
   assert(llvm::isa<Variable>(Src0));
   assert(llvm::cast<Variable>(Src0)->getRegNum() == RegX8632::Reg_eax);
   switch (Src0->getType()) {
   default:
     llvm_unreachable("unexpected source type!");
     break;
   case IceType_i8:
@@ skipping 30 matching lines @@
     Asm->cwd();
     break;
   case IceType_i32:
     assert(getDest()->getRegNum() == RegX8632::Reg_edx);
     Asm->cdq();
     break;
   }
 }
 
 void InstX8632Mul::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(llvm::isa<Variable>(getSrc(0)));
   assert(llvm::cast<Variable>(getSrc(0))->getRegNum() == RegX8632::Reg_eax);
   assert(getDest()->getRegNum() == RegX8632::Reg_eax); // TODO: allow edx?
   Str << "\tmul" << getWidthString(getDest()->getType()) << "\t";
   getSrc(1)->emit(Func);
 }
 
 void InstX8632Mul::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   assert(llvm::isa<Variable>(getSrc(0)));
   assert(llvm::cast<Variable>(getSrc(0))->getRegNum() == RegX8632::Reg_eax);
   assert(getDest()->getRegNum() == RegX8632::Reg_eax); // TODO: allow edx?
   const Operand *Src = getSrc(1);
   Type Ty = Src->getType();
   const static x86::AssemblerX86::GPREmitterOneOp Emitter = {
       &x86::AssemblerX86::mul, &x86::AssemblerX86::mul};
   emitIASOpTyGPR(Func, Ty, Src, Emitter);
 }
 
 void InstX8632Mul::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   dumpDest(Func);
   Str << " = mul." << getDest()->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Shld::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Variable *Dest = getDest();
   assert(getSrcSize() == 3);
   assert(Dest == getSrc(0));
   Str << "\tshld" << getWidthString(Dest->getType()) << "\t";
   if (const auto ShiftReg = llvm::dyn_cast<Variable>(getSrc(2))) {
     (void)ShiftReg;
     assert(ShiftReg->getRegNum() == RegX8632::Reg_ecx);
     Str << "%cl";
   } else {
@@ skipping 10 matching lines @@
   assert(getDest() == getSrc(0));
   const Variable *Dest = getDest();
   const Operand *Src1 = getSrc(1);
   const Operand *Src2 = getSrc(2);
   static const x86::AssemblerX86::GPREmitterShiftD Emitter = {
       &x86::AssemblerX86::shld, &x86::AssemblerX86::shld};
   emitIASGPRShiftDouble(Func, Dest, Src1, Src2, Emitter);
 }
 
 void InstX8632Shld::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   dumpDest(Func);
   Str << " = shld." << getDest()->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Shrd::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Variable *Dest = getDest();
   assert(getSrcSize() == 3);
   assert(Dest == getSrc(0));
   Str << "\tshrd" << getWidthString(Dest->getType()) << "\t";
   if (const auto ShiftReg = llvm::dyn_cast<Variable>(getSrc(2))) {
     (void)ShiftReg;
     assert(ShiftReg->getRegNum() == RegX8632::Reg_ecx);
     Str << "%cl";
   } else {
@@ skipping 10 matching lines @@
   assert(getDest() == getSrc(0));
   const Variable *Dest = getDest();
   const Operand *Src1 = getSrc(1);
   const Operand *Src2 = getSrc(2);
   static const x86::AssemblerX86::GPREmitterShiftD Emitter = {
       &x86::AssemblerX86::shrd, &x86::AssemblerX86::shrd};
   emitIASGPRShiftDouble(Func, Dest, Src1, Src2, Emitter);
 }
 
 void InstX8632Shrd::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   dumpDest(Func);
   Str << " = shrd." << getDest()->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Cmov::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Variable *Dest = getDest();
   Str << "\t";
   assert(Condition != CondX86::Br_None);
   assert(getDest()->hasReg());
   Str << "cmov" << InstX8632BrAttributes[Condition].DisplayString
       << getWidthString(Dest->getType()) << "\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   Dest->emit(Func);
 }
 
 void InstX8632Cmov::emitIAS(const Cfg *Func) const {
   assert(Condition != CondX86::Br_None);
   assert(getDest()->hasReg());
   assert(getSrcSize() == 2);
   // Only need the reg/reg form now.
   const auto SrcVar = llvm::cast<Variable>(getSrc(1));
   assert(SrcVar->hasReg());
   assert(SrcVar->getType() == IceType_i32);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   Asm->cmov(Condition, RegX8632::getEncodedGPR(getDest()->getRegNum()),
             RegX8632::getEncodedGPR(SrcVar->getRegNum()));
 }
 
 void InstX8632Cmov::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "cmov" << InstX8632BrAttributes[Condition].DisplayString << ".";
   Str << getDest()->getType() << " ";
   dumpDest(Func);
   Str << ", ";
   dumpSources(Func);
 }
 
 void InstX8632Cmpps::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(Condition < CondX86::Cmpps_Invalid);
   Str << "\t";
   Str << "cmp" << InstX8632CmppsAttributes[Condition].EmitString << "ps"
       << "\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getDest()->emit(Func);
 }
@@ skipping 11 matching lines @@
                RegX8632::getEncodedXmm(SrcVar->getRegNum()), Condition);
   } else {
     x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
                                     ->stackVarToAsmOperand(SrcVar);
     Asm->cmpps(RegX8632::getEncodedXmm(getDest()->getRegNum()), SrcStackAddr,
                Condition);
   }
 }
 
 void InstX8632Cmpps::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   assert(Condition < CondX86::Cmpps_Invalid);
   dumpDest(Func);
   Str << " = cmp" << InstX8632CmppsAttributes[Condition].EmitString << "ps"
       << "\t";
   dumpSources(Func);
 }
 
 void InstX8632Cmpxchg::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\tcmpxchg" << getWidthString(getSrc(0)->getType()) << "\t";
   getSrc(2)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
@@ skipping 10 matching lines @@
   const RegX8632::GPRRegister Reg =
       RegX8632::getEncodedGPR(VarReg->getRegNum());
   if (Locked) {
     Asm->LockCmpxchg(Ty, Addr, Reg);
   } else {
     Asm->cmpxchg(Ty, Addr, Reg);
   }
 }
 
 void InstX8632Cmpxchg::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
   Str << "cmpxchg." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Cmpxchg8b::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 5);
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\tcmpxchg8b\t";
   getSrc(0)->emit(Func);
 }
 
 void InstX8632Cmpxchg8b::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 5);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
   if (Locked) {
     Asm->lock();
   }
   Asm->cmpxchg8b(Addr);
 }
 
 void InstX8632Cmpxchg8b::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
   Str << "cmpxchg8b ";
   dumpSources(Func);
 }
 
 void InstX8632Cvt::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tcvt";
   if (isTruncating())
     Str << "t";
   Str << TypeX8632Attributes[getSrc(0)->getType()].CvtString << "2"
       << TypeX8632Attributes[getDest()->getType()].CvtString << "\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getDest()->emit(Func);
@@ skipping 52 matching lines @@
     assert(isVectorIntegerType(DestTy));
     static const x86::AssemblerX86::XmmEmitterRegOp Emitter = {
         &x86::AssemblerX86::cvttps2dq, &x86::AssemblerX86::cvttps2dq};
     emitIASRegOpTyXMM(Func, DestTy, Dest, Src, Emitter);
     return;
   }
   }
 }
 
 void InstX8632Cvt::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   dumpDest(Func);
   Str << " = cvt";
   if (isTruncating())
     Str << "t";
   Str << TypeX8632Attributes[getSrc(0)->getType()].CvtString << "2"
       << TypeX8632Attributes[getDest()->getType()].CvtString << " ";
   dumpSources(Func);
 }
 
 void InstX8632Icmp::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\tcmp" << getWidthString(getSrc(0)->getType()) << "\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 void InstX8632Icmp::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   const Operand *Src0 = getSrc(0);
   const Operand *Src1 = getSrc(1);
   Type Ty = Src0->getType();
   static const x86::AssemblerX86::GPREmitterRegOp RegEmitter = {
     &x86::AssemblerX86::cmp, &x86::AssemblerX86::cmp, &x86::AssemblerX86::cmp
   };
   static const x86::AssemblerX86::GPREmitterAddrOp AddrEmitter = {
     &x86::AssemblerX86::cmp, &x86::AssemblerX86::cmp
   };
   if (const auto SrcVar0 = llvm::dyn_cast<Variable>(Src0)) {
     if (SrcVar0->hasReg()) {
       emitIASRegOpTyGPR(Func, Ty, SrcVar0, Src1, RegEmitter);
       return;
     }
   }
   emitIASAsAddrOpTyGPR(Func, Ty, Src0, Src1, AddrEmitter);
 }
 
 void InstX8632Icmp::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "cmp." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Ucomiss::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\tucomi" << TypeX8632Attributes[getSrc(0)->getType()].SdSsString
       << "\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 void InstX8632Ucomiss::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   // Currently src0 is always a variable by convention, to avoid having
   // two memory operands.
   assert(llvm::isa<Variable>(getSrc(0)));
   const auto Src0Var = llvm::cast<Variable>(getSrc(0));
   Type Ty = Src0Var->getType();
   const static x86::AssemblerX86::XmmEmitterRegOp Emitter = {
     &x86::AssemblerX86::ucomiss, &x86::AssemblerX86::ucomiss
   };
   emitIASRegOpTyXMM(Func, Ty, Src0Var, getSrc(1), Emitter);
 }
 
 void InstX8632Ucomiss::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "ucomiss." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632UD2::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   Str << "\tud2";
 }
 
 void InstX8632UD2::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   Asm->ud2();
 }
 
 void InstX8632UD2::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "ud2\n";
 }
 
 void InstX8632Test::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\ttest" << getWidthString(getSrc(0)->getType()) << "\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 void InstX8632Test::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
@@ skipping 10 matching lines @@
     if (SrcVar0->hasReg()) {
       emitIASRegOpTyGPR(Func, Ty, SrcVar0, Src1, RegEmitter);
       return;
     }
   }
   llvm_unreachable("Nothing actually generates this so it's untested");
   emitIASAsAddrOpTyGPR(Func, Ty, Src0, Src1, AddrEmitter);
 }
 
 void InstX8632Test::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "test." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Mfence::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   Str << "\tmfence";
 }
 
 void InstX8632Mfence::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   Asm->mfence();
 }
 
 void InstX8632Mfence::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "mfence\n";
 }
 
 void InstX8632Store::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Type Ty = getSrc(0)->getType();
   Str << "\tmov" << getWidthString(Ty) << TypeX8632Attributes[Ty].SdSsString
       << "\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
 }
 
@@ skipping 21 matching lines @@
     return;
   } else {
     assert(isScalarIntegerType(DestTy));
     static const x86::AssemblerX86::GPREmitterAddrOp GPRAddrEmitter = {
         &x86::AssemblerX86::mov, &x86::AssemblerX86::mov};
     emitIASAsAddrOpTyGPR(Func, DestTy, Dest, Src, GPRAddrEmitter);
   }
 }
 
 void InstX8632Store::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "mov." << getSrc(0)->getType() << " ";
   getSrc(1)->dump(Func);
   Str << ", ";
   getSrc(0)->dump(Func);
 }
 
 void InstX8632StoreP::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\tmovups\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
 }
 
 void InstX8632StoreP::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   assert(getSrcSize() == 2);
   const auto SrcVar = llvm::cast<Variable>(getSrc(0));
   const auto DestMem = llvm::cast<OperandX8632Mem>(getSrc(1));
   assert(DestMem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   assert(SrcVar->hasReg());
   Asm->movups(DestMem->toAsmAddress(Asm),
               RegX8632::getEncodedXmm(SrcVar->getRegNum()));
 }
 
 void InstX8632StoreP::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "storep." << getSrc(0)->getType() << " ";
   getSrc(1)->dump(Func);
   Str << ", ";
   getSrc(0)->dump(Func);
 }
 
 void InstX8632StoreQ::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(getSrc(1)->getType() == IceType_i64 ||
          getSrc(1)->getType() == IceType_f64);
   Str << "\tmovq\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
 }
 
 void InstX8632StoreQ::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   assert(getSrcSize() == 2);
   const auto SrcVar = llvm::cast<Variable>(getSrc(0));
   const auto DestMem = llvm::cast<OperandX8632Mem>(getSrc(1));
   assert(DestMem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   assert(SrcVar->hasReg());
   Asm->movq(DestMem->toAsmAddress(Asm),
             RegX8632::getEncodedXmm(SrcVar->getRegNum()));
 }
 
 void InstX8632StoreQ::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "storeq." << getSrc(0)->getType() << " ";
   getSrc(1)->dump(Func);
   Str << ", ";
   getSrc(0)->dump(Func);
 }
 
 template <> void InstX8632Lea::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   assert(getDest()->hasReg());
   Str << "\tleal\t";
   Operand *Src0 = getSrc(0);
   if (const auto Src0Var = llvm::dyn_cast<Variable>(Src0)) {
     Type Ty = Src0Var->getType();
     // lea on x86-32 doesn't accept mem128 operands, so cast VSrc0 to an
     // acceptable type.
     Src0Var->asType(isVectorType(Ty) ? IceType_i32 : Ty).emit(Func);
   } else {
     Src0->emit(Func);
   }
   Str << ", ";
   getDest()->emit(Func);
 }
 
 template <> void InstX8632Mov::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Operand *Src = getSrc(0);
   Type SrcTy = Src->getType();
   Type DestTy = getDest()->getType();
   Str << "\tmov" << (!isScalarFloatingType(DestTy)
                          ? getWidthString(SrcTy)
                          : TypeX8632Attributes[DestTy].SdSsString) << "\t";
   // For an integer truncation operation, src is wider than dest.
   // Ideally, we use a mov instruction whose data width matches the
@@ skipping 108 matching lines @@
       Asm->movd(RegX8632::getEncodedGPR(Dest->getRegNum()), SrcReg);
     } else {
       x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
                                  ->stackVarToAsmOperand(Dest));
       Asm->movd(StackAddr, SrcReg);
     }
   }
 }
 
 template <> void InstX8632Movp::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   // TODO(wala,stichnot): movups works with all vector operands, but
   // there exist other instructions (movaps, movdqa, movdqu) that may
   // perform better, depending on the data type and alignment of the
   // operands.
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tmovups\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getDest()->emit(Func);
 }
 
 template <> void InstX8632Movp::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 1);
   assert(isVectorType(getDest()->getType()));
   const Variable *Dest = getDest();
   const Operand *Src = getSrc(0);
   const static x86::AssemblerX86::XmmEmitterMovOps Emitter = {
     &x86::AssemblerX86::movups, &x86::AssemblerX86::movups,
     &x86::AssemblerX86::movups
   };
   emitIASMovlikeXMM(Func, Dest, Src, Emitter);
 }
 
 template <> void InstX8632Movq::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   assert(getDest()->getType() == IceType_i64 ||
          getDest()->getType() == IceType_f64);
   Str << "\tmovq\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getDest()->emit(Func);
 }
 
@@ skipping 39 matching lines @@
   assert(getSrcSize() == 1);
   const Variable *Dest = getDest();
   const Operand *Src = getSrc(0);
   Type SrcTy = Src->getType();
   assert(typeWidthInBytes(Dest->getType()) > 1);
   assert(typeWidthInBytes(Dest->getType()) > typeWidthInBytes(SrcTy));
   emitIASRegOpTyGPR<false, true>(Func, SrcTy, Dest, Src, Emitter);
 }
 
 void InstX8632Nop::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   // TODO: Emit the right code for each variant.
   Str << "\tnop\t# variant = " << Variant;
 }
 
 void InstX8632Nop::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   // TODO: Emit the right code for the variant.
   Asm->nop();
 }
 
 void InstX8632Nop::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "nop (variant = " << Variant << ")";
 }
 
 void InstX8632Fld::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Type Ty = getSrc(0)->getType();
   SizeT Width = typeWidthInBytes(Ty);
   const auto Var = llvm::dyn_cast<Variable>(getSrc(0));
   if (Var && Var->hasReg()) {
     // This is a physical xmm register, so we need to spill it to a
     // temporary stack slot.
     Str << "\tsubl\t$" << Width << ", %esp"
         << "\n";
@@ skipping 33 matching lines @@
     assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
     Asm->fld(Ty, Mem->toAsmAddress(Asm));
   } else if (const auto Imm = llvm::dyn_cast<Constant>(Src)) {
     Asm->fld(Ty, x86::Address::ofConstPool(Func->getContext(), Asm, Imm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
 }
 
 void InstX8632Fld::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "fld." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Fstp::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   // TODO(jvoung,stichnot): Utilize this by setting Dest to nullptr to
   // "partially" delete the fstp if the Dest is unused.
   // Even if Dest is unused, the fstp should be kept for the SideEffects
   // of popping the stack.
   if (!getDest()) {
     Str << "\tfstp\tst(0)";
     return;
   }
@@ skipping 43 matching lines @@
     x86::Immediate Width(typeWidthInBytes(Ty));
     Asm->sub(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
     x86::Address StackSlot = x86::Address(RegX8632::Encoded_Reg_esp, 0);
     Asm->fstp(Ty, StackSlot);
     Asm->movss(Ty, RegX8632::getEncodedXmm(Dest->getRegNum()), StackSlot);
     Asm->add(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
   }
 }
 
 void InstX8632Fstp::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   dumpDest(Func);
   Str << " = fstp." << getDest()->getType() << ", st(0)";
   Str << "\n";
 }
 
 template <> void InstX8632Pcmpeq::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "pcmpeq%s",
            TypeX8632Attributes[getDest()->getType()].PackString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Pcmpgt::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "pcmpgt%s",
            TypeX8632Attributes[getDest()->getType()].PackString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Pextr::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   // pextrb and pextrd are SSE4.1 instructions.
   assert(getSrc(0)->getType() == IceType_v8i16 ||
          getSrc(0)->getType() == IceType_v8i1 ||
          static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet()
              >= TargetX8632::SSE4_1);
   Str << "\t" << Opcode
       << TypeX8632Attributes[getSrc(0)->getType()].PackString << "\t";
   getSrc(1)->emit(Func);
@@ skipping 24 matching lines @@
   assert(llvm::cast<Variable>(getSrc(0))->hasReg());
   static const x86::AssemblerX86::ThreeOpImmEmitter<
       RegX8632::GPRRegister, RegX8632::XmmRegister> Emitter = {
       &x86::AssemblerX86::pextr, nullptr};
   emitIASThreeOpImmOps<RegX8632::GPRRegister, RegX8632::XmmRegister,
                        RegX8632::getEncodedGPR, RegX8632::getEncodedXmm>(
       Func, DispatchTy, Dest, getSrc(0), getSrc(1), Emitter);
 }
 
 template <> void InstX8632Pinsr::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   // pinsrb and pinsrd are SSE4.1 instructions.
   assert(getDest()->getType() == IceType_v8i16 ||
          getDest()->getType() == IceType_v8i1 ||
          static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet()
              >= TargetX8632::SSE4_1);
   Str << "\t" << Opcode
       << TypeX8632Attributes[getDest()->getType()].PackString << "\t";
   getSrc(2)->emit(Func);
@@ skipping 53 matching lines @@
   Type Ty = Dest->getType();
   static const x86::AssemblerX86::ThreeOpImmEmitter<
       RegX8632::XmmRegister, RegX8632::XmmRegister> Emitter = {
       &x86::AssemblerX86::shufps, &x86::AssemblerX86::shufps};
   emitIASThreeOpImmOps<RegX8632::XmmRegister, RegX8632::XmmRegister,
                        RegX8632::getEncodedXmm, RegX8632::getEncodedXmm>(
       Func, Ty, Dest, getSrc(1), getSrc(2), Emitter);
 }
 
 void InstX8632Pop::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   Str << "\tpop\t";
   getDest()->emit(Func);
 }
 
 void InstX8632Pop::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 0);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   if (getDest()->hasReg()) {
     Asm->popl(RegX8632::getEncodedGPR(getDest()->getRegNum()));
   } else {
     Asm->popl(static_cast<TargetX8632 *>(Func->getTarget())
                   ->stackVarToAsmOperand(getDest()));
   }
 }
 
 void InstX8632Pop::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   dumpDest(Func);
   Str << " = pop." << getDest()->getType() << " ";
 }
 
 void InstX8632AdjustStack::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\tsubl\t$" << Amount << ", %esp";
   Func->getTarget()->updateStackAdjustment(Amount);
 }
 
 void InstX8632AdjustStack::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   Asm->sub(IceType_i32, RegX8632::Encoded_Reg_esp, x86::Immediate(Amount));
   Func->getTarget()->updateStackAdjustment(Amount);
 }
 
 void InstX8632AdjustStack::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "esp = sub.i32 esp, " << Amount;
 }
 
 void InstX8632Push::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   // Push is currently only used for saving GPRs.
   const auto Var = llvm::cast<Variable>(getSrc(0));
   assert(Var->hasReg());
   Str << "\tpush\t";
   Var->emit(Func);
 }
 
 void InstX8632Push::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 1);
   // Push is currently only used for saving GPRs.
   const auto Var = llvm::cast<Variable>(getSrc(0));
   assert(Var->hasReg());
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   Asm->pushl(RegX8632::getEncodedGPR(Var->getRegNum()));
 }
 
 void InstX8632Push::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "push." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 template <> void InstX8632Psll::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   assert(getDest()->getType() == IceType_v8i16 ||
          getDest()->getType() == IceType_v8i1 ||
          getDest()->getType() == IceType_v4i32 ||
          getDest()->getType() == IceType_v4i1);
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "psll%s",
            TypeX8632Attributes[getDest()->getType()].PackString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Psra::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   assert(getDest()->getType() == IceType_v8i16 ||
          getDest()->getType() == IceType_v8i1 ||
          getDest()->getType() == IceType_v4i32 ||
          getDest()->getType() == IceType_v4i1);
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "psra%s",
            TypeX8632Attributes[getDest()->getType()].PackString);
   emitTwoAddress(buf, this, Func);
 }
 
 void InstX8632Ret::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\tret";
 }
 
 void InstX8632Ret::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   Asm->ret();
 }
 
 void InstX8632Ret::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Type Ty = (getSrcSize() == 0 ? IceType_void : getSrc(0)->getType());
   Str << "ret." << Ty << " ";
   dumpSources(Func);
 }
 
 void InstX8632Xadd::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\txadd" << getWidthString(getSrc(0)->getType()) << "\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 void InstX8632Xadd::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   Type Ty = getSrc(0)->getType();
   const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
   const auto VarReg = llvm::cast<Variable>(getSrc(1));
   assert(VarReg->hasReg());
   const RegX8632::GPRRegister Reg =
       RegX8632::getEncodedGPR(VarReg->getRegNum());
   if (Locked) {
     Asm->lock();
   }
   Asm->xadd(Ty, Addr, Reg);
 }
 
 void InstX8632Xadd::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
   Type Ty = getSrc(0)->getType();
   Str << "xadd." << Ty << " ";
   dumpSources(Func);
 }
 
 void InstX8632Xchg::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\txchg" << getWidthString(getSrc(0)->getType()) << "\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
 }
 
 void InstX8632Xchg::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   Type Ty = getSrc(0)->getType();
   const auto Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
   const auto VarReg = llvm::cast<Variable>(getSrc(1));
   assert(VarReg->hasReg());
   const RegX8632::GPRRegister Reg =
       RegX8632::getEncodedGPR(VarReg->getRegNum());
   Asm->xchg(Ty, Addr, Reg);
 }
 
 void InstX8632Xchg::dump(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrDump();
   Type Ty = getSrc(0)->getType();
   Str << "xchg." << Ty << " ";
   dumpSources(Func);
 }
 
 void OperandX8632Mem::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   if (SegmentReg != DefaultSegment) {
     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM);
     Str << InstX8632SegmentRegNames[SegmentReg] << ":";
   }
   // Emit as Offset(Base,Index,1<<Shift).
   // Offset is emitted without the leading '$'.
   // Omit the (Base,Index,1<<Shift) part if Base==nullptr.
   if (!Offset) {
     // No offset, emit nothing.
@@ skipping 14 matching lines @@
       Str << ",";
       Index->emit(Func);
       if (Shift)
         Str << "," << (1u << Shift);
     }
     Str << ")";
   }
 }
 
 void OperandX8632Mem::dump(const Cfg *Func, Ostream &Str) const {
+  if (!ALLOW_DUMP)
+    return;
   if (SegmentReg != DefaultSegment) {
     assert(SegmentReg >= 0 && SegmentReg < SegReg_NUM);
     Str << InstX8632SegmentRegNames[SegmentReg] << ":";
   }
   bool Dumped = false;
   Str << "[";
   if (Base) {
     if (Func)
       Base->dump(Func);
     else
@@ skipping 79 matching lines @@
 x86::Address VariableSplit::toAsmAddress(const Cfg *Func) const {
   assert(!Var->hasReg());
   const TargetLowering *Target = Func->getTarget();
   int32_t Offset =
       Var->getStackOffset() + Target->getStackAdjustment() + getOffset();
   return x86::Address(RegX8632::getEncodedGPR(Target->getFrameOrStackReg()),
                       Offset);
 }
 
 void VariableSplit::emit(const Cfg *Func) const {
+  if (!ALLOW_DUMP)
+    return;
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(!Var->hasReg());
   // The following is copied/adapted from TargetX8632::emitVariable().
   const TargetLowering *Target = Func->getTarget();
   const Type Ty = IceType_i32;
   int32_t Offset =
       Var->getStackOffset() + Target->getStackAdjustment() + getOffset();
   if (Offset)
     Str << Offset;
   Str << "(%" << Target->getRegName(Target->getFrameOrStackReg(), Ty) << ")";
 }
 
 void VariableSplit::dump(const Cfg *Func, Ostream &Str) const {
+  if (!ALLOW_DUMP)
+    return;
   switch (Part) {
   case Low:
     Str << "low";
     break;
   case High:
     Str << "high";
     break;
   default:
     Str << "???";
     break;
   }
   Str << "(";
   if (Func)
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // end of namespace Ice