Add MinidumpContextWriter::CreateFromSnapshot(), everything downstream, and its test

minidump/minidump_context.h

 // Copyright 2014 The Crashpad Authors. All rights reserved.
 //
 // Licensed under the Apache License, Version 2.0 (the "License");
 // you may not use this file except in compliance with the License.
 // You may obtain a copy of the License at
 //
 //     http://www.apache.org/licenses/LICENSE-2.0
 //
 // Unless required by applicable law or agreed to in writing, software
 // distributed under the License is distributed on an "AS IS" BASIS,
 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
 #ifndef CRASHPAD_MINIDUMP_MINIDUMP_CONTEXT_H_
 #define CRASHPAD_MINIDUMP_MINIDUMP_CONTEXT_H_
 
 #include <stdint.h>
 
+#include "snapshot/cpu_context.h"
 #include "util/numeric/int128.h"
 
 namespace crashpad {
 
 //! \brief Architecture-independent flags for `context_flags` fields in Minidump
 //!    context structures.
 //
 // http://zachsaw.blogspot.com/2010/11/wow64-bug-getthreadcontext-may-return.html#c5639760895973344002
 enum MinidumpContextFlags : uint32_t {
   //! \brief The thread was executing a trap handler in kernel mode
@@ skipping 93 matching lines @@
                            kMinidumpContextX86FloatingPoint |
                            kMinidumpContextX86Debug |
                            kMinidumpContextX86Extended,
 };
 
 //! \brief A 32-bit x86 CPU context (register state) carried in a minidump file.
 //!
 //! This is analogous to the `CONTEXT` structure on Windows when targeting
 //! 32-bit x86. This structure is used instead of `CONTEXT` to make it available
 //! when targeting other architectures.
+//!
+//! \note This structure doesn’t carry `dr4` or `dr5`, which are obsolete and
+//!     normally alias `dr6` and `dr7`, respectively. See Intel Software
+//!     Developer’s Manual, Volume 3B: System Programming, Part 2 (253669-052),
+//!     17.2.2 “Debug Registers DR4 and DR5”.
 struct MinidumpContextX86 {
   //! \brief A bitfield composed of values of #MinidumpContextFlags and
   //!     #MinidumpContextX86Flags.
   //!
   //! This field identifies the context structure as a 32-bit x86 CPU context,
   //! and indicates which other fields in the structure are valid.
   uint32_t context_flags;
 
   uint32_t dr0;
   uint32_t dr1;
@@ skipping 26 matching lines @@
   uint32_t ecx;
   uint32_t eax;
 
   uint32_t ebp;
   uint32_t eip;
   uint32_t cs;
   uint32_t eflags;
   uint32_t esp;
   uint32_t ss;
 
-  uint8_t extended_registers[512];
+  // CPUContextX86::Fxsave has identical layout to what the x86 CONTEXT
+  // structure places here.
+  CPUContextX86::Fxsave fxsave;
 };
 
 //! \brief x86_64-specifc flags for MinidumpContextAMD64::context_flags.
 enum MinidumpContextAMD64Flags : uint32_t {
   //! \brief Identifies the context structure as x86_64. This is the same as
   //!     `CONTEXT_AMD64` on Windows for this architecture.
   kMinidumpContextAMD64 = 0x00100000,
 
   //! \brief Indicates the validity of control registers (`CONTEXT_CONTROL`).
   //!
@@ skipping 43 matching lines @@
                              kMinidumpContextAMD64Segment |
                              kMinidumpContextAMD64Debug,
 };
 
 //! \brief An x86_64 (AMD64) CPU context (register state) carried in a minidump
 //!     file.
 //!
 //! This is analogous to the `CONTEXT` structure on Windows when targeting
 //! x86_64. This structure is used instead of `CONTEXT` to make it available
 //! when targeting other architectures.
+//!
+//! \note This structure doesn’t carry `dr4` or `dr5`, which are obsolete and
+//!     normally alias `dr6` and `dr7`, respectively. See Intel Software
+//!     Developer’s Manual, Volume 3B: System Programming, Part 2 (253669-052),
+//!     17.2.2 “Debug Registers DR4 and DR5”.
 struct __attribute__((aligned(16))) MinidumpContextAMD64 {
   //! \brief Register parameter home address.
   //!
   //! On Windows, this field may contain the “home” address (on-stack, in the
   //! shadow area) of a parameter passed by register. This field is present for
   //! convenience but is not necessarily populated, even if a corresponding
   //! parameter was passed by register.
   //!
   //! \{
   uint64_t p1_home;
@@ skipping 41 matching lines @@
   uint64_t r9;
   uint64_t r10;
   uint64_t r11;
   uint64_t r12;
   uint64_t r13;
   uint64_t r14;
   uint64_t r15;
 
   uint64_t rip;
 
-  union {
-    struct {
-      uint16_t control_word;
-      uint16_t status_word;
-      uint8_t tag_word;
-      uint8_t reserved_1;
-      uint16_t error_opcode;
-      uint32_t error_offset;
-      uint16_t error_selector;
-      uint16_t reserved_2;
-      uint32_t data_offset;
-      uint16_t data_selector;
-      uint16_t reserved_3;
-      uint32_t mx_csr;
-      uint32_t mx_csr_mask;
-      uint128_struct float_registers[8];
-      uint128_struct xmm_registers[16];
-      uint8_t reserved_4[96];
-    } float_save;
-    struct {
-      uint128_struct header[2];
-      uint128_struct legacy[8];
-      uint128_struct xmm0;
-      uint128_struct xmm1;
-      uint128_struct xmm2;
-      uint128_struct xmm3;
-      uint128_struct xmm4;
-      uint128_struct xmm5;
-      uint128_struct xmm6;
-      uint128_struct xmm7;
-      uint128_struct xmm8;
-      uint128_struct xmm9;
-      uint128_struct xmm10;
-      uint128_struct xmm11;
-      uint128_struct xmm12;
-      uint128_struct xmm13;
-      uint128_struct xmm14;
-      uint128_struct xmm15;
-    };
-  };
+  // CPUContextX86_64::Fxsave has identical layout to what the x86_64 CONTEXT
+  // structure places here.
+  CPUContextX86_64::Fxsave fxsave;
 
   uint128_struct vector_register[26];
   uint64_t vector_control;
 
   //! \brief Model-specific debug extension register.
   //!
   //! See Intel Software Developer’s Manual, Volume 3B: System Programming, Part
   //! 2 (253669-051), 17.4 “Last Branch, Interrupt, and Exception Recording
   //! Overview”, and AMD Architecture Programmer’s Manual, Volume 2:
   //! System Programming (24593-3.24), 13.1.6 “Control-Transfer Breakpoint
   //! Features”.
   //!
   //! \{
   uint64_t debug_control;
   uint64_t last_branch_to_rip;
   uint64_t last_branch_from_rip;
   uint64_t last_exception_to_rip;
   uint64_t last_exception_from_rip;
   //! \}
 };
 
 }  // namespace crashpad
 
 #endif  // CRASHPAD_MINIDUMP_MINIDUMP_CONTEXT_H_