[turbofan] move Node to vreg mapping to InstructionSelector

test/unittests/compiler/instruction-selector-unittest.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "test/unittests/compiler/instruction-selector-unittest.h"
 
 #include "src/compiler/graph-inl.h"
 #include "src/flags.h"
 #include "test/unittests/compiler/compiler-test-utils.h"
 
@@ skipping 19 matching lines @@
     InstructionSelectorTest::StreamBuilderMode mode) {
   Schedule* schedule = Export();
   if (FLAG_trace_turbo) {
     OFStream out(stdout);
     out << "=== Schedule before instruction selection ===" << std::endl
         << *schedule;
   }
   EXPECT_NE(0, graph()->NodeCount());
   int initial_node_count = graph()->NodeCount();
   Linkage linkage(test_->zone(), call_descriptor());
-  InstructionSequence sequence(test_->zone(), graph(), schedule);
+  InstructionSequence sequence(test_->zone(), schedule);
   SourcePositionTable source_position_table(graph());
-  InstructionSelector selector(test_->zone(), &linkage, &sequence, schedule,
-                               &source_position_table, features);
+  InstructionSelector selector(test_->zone(), graph(), &linkage, &sequence,
+                               schedule, &source_position_table, features);
   selector.SelectInstructions();
   if (FLAG_trace_turbo) {
     OFStream out(stdout);
     out << "=== Code sequence after instruction selection ===" << std::endl
         << sequence;
   }
   Stream s;
   // Map virtual registers.
   {
-    const NodeToVregMap& node_map = sequence.GetNodeMapForTesting();
+    const NodeToVregMap& node_map = selector.GetNodeMapForTesting();
     for (int i = 0; i < initial_node_count; ++i) {
-      if (node_map[i] != InstructionSequence::kNodeUnmapped) {
+      if (node_map[i] != InstructionSelector::kNodeUnmapped) {
         s.virtual_registers_.insert(std::make_pair(i, node_map[i]));
       }
     }
   }
   std::set<int> virtual_registers;
   for (InstructionSequence::const_iterator i = sequence.begin();
        i != sequence.end(); ++i) {
     Instruction* instr = *i;
     if (instr->opcode() < 0) continue;
     if (mode == kTargetInstructions) {
@@ skipping 502 matching lines @@
   EXPECT_EQ(s.ToVreg(context2), s.ToVreg(call_instr->InputAt(12)));
   // Continuation.
 
   EXPECT_EQ(kArchRet, s[index++]->arch_opcode());
   EXPECT_EQ(index, s.size());
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8