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Side by Side Diff: src/IceTargetLoweringX8632.h

Issue 682983004: Subzero: Decorate the text asm output with register availability info. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Change to -asm-verbose. Make another emit helper function. Created 6 years, 1 month ago
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1 //===- subzero/src/IceTargetLoweringX8632.h - x86-32 lowering ---*- C++ -*-===// 1 //===- subzero/src/IceTargetLoweringX8632.h - x86-32 lowering ---*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file declares the TargetLoweringX8632 class, which 10 // This file declares the TargetLoweringX8632 class, which
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28 TargetX8632(const TargetX8632 &) = delete; 28 TargetX8632(const TargetX8632 &) = delete;
29 TargetX8632 &operator=(const TargetX8632 &) = delete; 29 TargetX8632 &operator=(const TargetX8632 &) = delete;
30 30
31 public: 31 public:
32 static TargetX8632 *create(Cfg *Func) { return new TargetX8632(Func); } 32 static TargetX8632 *create(Cfg *Func) { return new TargetX8632(Func); }
33 33
34 void translateOm1() override; 34 void translateOm1() override;
35 void translateO2() override; 35 void translateO2() override;
36 bool doBranchOpt(Inst *I, const CfgNode *NextNode) override; 36 bool doBranchOpt(Inst *I, const CfgNode *NextNode) override;
37 37
38 SizeT getNumRegisters() const override { return RegX8632::Reg_NUM; }
38 Variable *getPhysicalRegister(SizeT RegNum, Type Ty = IceType_void) override; 39 Variable *getPhysicalRegister(SizeT RegNum, Type Ty = IceType_void) override;
39 IceString getRegName(SizeT RegNum, Type Ty) const override; 40 IceString getRegName(SizeT RegNum, Type Ty) const override;
40 llvm::SmallBitVector getRegisterSet(RegSetMask Include, 41 llvm::SmallBitVector getRegisterSet(RegSetMask Include,
41 RegSetMask Exclude) const override; 42 RegSetMask Exclude) const override;
42 const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const override { 43 const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const override {
43 return TypeToRegisterSet[Ty]; 44 return TypeToRegisterSet[Ty];
44 } 45 }
45 bool hasFramePointer() const override { return IsEbpBasedFrame; } 46 bool hasFramePointer() const override { return IsEbpBasedFrame; }
46 SizeT getFrameOrStackReg() const override { 47 SizeT getFrameOrStackReg() const override {
47 return IsEbpBasedFrame ? RegX8632::Reg_ebp : RegX8632::Reg_esp; 48 return IsEbpBasedFrame ? RegX8632::Reg_ebp : RegX8632::Reg_esp;
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512 }; 513 };
513 514
514 template <> void ConstantInteger32::emit(GlobalContext *Ctx) const; 515 template <> void ConstantInteger32::emit(GlobalContext *Ctx) const;
515 template <> void ConstantInteger64::emit(GlobalContext *Ctx) const; 516 template <> void ConstantInteger64::emit(GlobalContext *Ctx) const;
516 template <> void ConstantFloat::emit(GlobalContext *Ctx) const; 517 template <> void ConstantFloat::emit(GlobalContext *Ctx) const;
517 template <> void ConstantDouble::emit(GlobalContext *Ctx) const; 518 template <> void ConstantDouble::emit(GlobalContext *Ctx) const;
518 519
519 } // end of namespace Ice 520 } // end of namespace Ice
520 521
521 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632_H 522 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632_H
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