Subzero: Decorate the text asm output with register availability info.

src/IceCfg.cpp

 //===- subzero/src/IceCfg.cpp - Control flow graph implementation ---------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the Cfg class, including constant pool
@@ skipping 347 matching lines @@
             Var->dump(this);
             Str << " live range " << Var->getLiveRange() << "\n";
           }
         }
       }
     }
   }
   return Valid;
 }
 
-// Deletes redundant assignments like "var=var".  This includes
-// architecturally redundant moves like "var1:eax=var2:eax".  As such,
-// this needs to be done very late in the translation to avoid
-// liveness inconsistencies.
-void Cfg::deleteRedundantAssignments() {
-  for (CfgNode *Node : Nodes) {
-    // Ignore Phi instructions.
-    for (Inst *I : Node->getInsts())
-      if (I->isRedundantAssign())
-        I->setDeleted();
-  }
-}
-
 void Cfg::contractEmptyNodes() {
+  // If we're decorating the asm output with register liveness info,
+  // this information may become corrupted or incorrect after
+  // contracting nodes that contain only redundant assignments.  As
+  // such, we disable this pass when DecorateAsm is specified.  This
+  // may make the resulting code look more branchy, but it should have
+  // no effect on the register assignments.
+  if (Ctx->getFlags().DecorateAsm)
+    return;
   for (CfgNode *Node : Nodes) {
     Node->contractIfEmpty();
   }
 }
 
 void Cfg::doBranchOpt() {
   TimerMarker T(TimerStack::TT_doBranchOpt, this);
   for (auto I = Nodes.begin(), E = Nodes.end(); I != E; ++I) {
     auto NextNode = I;
     ++NextNode;
     (*I)->doBranchOpt(NextNode == E ? NULL : *NextNode);
   }
 }
 
 // ======================== Dump routines ======================== //
 
 void Cfg::emit() {
   TimerMarker T(TimerStack::TT_emit, this);
+  if (Ctx->getFlags().DecorateAsm) {
+    renumberInstructions();
+    getVMetadata()->init(VMK_Uses);
+    liveness(Liveness_Basic);
+    dump("After recomputing liveness for -decorate-asm");
+  }
   Ostream &Str = Ctx->getStrEmit();
   if (!Ctx->testAndSetHasEmittedFirstMethod()) {
     // Print a helpful command for assembling the output.
     // TODO: have the Target emit the header
     // TODO: need a per-file emit in addition to per-CFG
     Str << "# $LLVM_BIN_PATH/llvm-mc"
         << " -arch=x86"
         << " -x86-asm-syntax=intel"
         << " -filetype=obj"
         << " -o=MyObj.o"
@@ skipping 53 matching lines @@
     }
   }
   // Print each basic block
   for (CfgNode *Node : Nodes)
     Node->dump(this);
   if (getContext()->isVerbose(IceV_Instructions))
     Str << "}\n";
 }
 
 } // end of namespace Ice