Add vrint{a,n,p,m,z} instructions to arm assembler.

src/arm/disasm-arm.cc

Index: src/arm/disasm-arm.cc
diff --git a/src/arm/disasm-arm.cc b/src/arm/disasm-arm.cc
index 2f3a9c72228db569859e5b95e6053ce3ad7c362a..744f3585bd538b5dae10a624056777580d2413a9 100644
--- a/src/arm/disasm-arm.cc
+++ b/src/arm/disasm-arm.cc
@@ -1277,6 +1277,23 @@ void Decoder::DecodeTypeVFP(Instruction* instr) {
         } else {
           Unknown(instr);  // Not used by V8.
         }
+      } else if (((instr->Opc2Value() == 0x6)) && (instr->Opc3Value() & 0x1)) {
+        bool dp_operation = (instr->SzValue() == 1);
+        if (instr->Opc3Value() & 0x2) {
+          // vrintz - round towards zero (truncate)
+          if (dp_operation) {
+            Format(instr, "vrintz'cond.f64.f64 'Dd, 'Dm");
+          } else {
+            Format(instr, "vrintz'cond.f32.f32 'Sd, 'Sm");
+          }
+        } else {
+          // vrintr - round according to rounding mode in FPSCR

[Rodolph Perfetta (ARM), 2014/10/28 19:41:41]

vrintr is not implemented by this patch, usually the disassembler only provide
support for what V8 generates (and test). So how about calling Unknown(instr);
here.

[sigurds, 2014/10/29 11:47:15]

Done.

+          if (dp_operation) {
+            Format(instr, "vrintr'cond.f64.f64 'Dd, 'Dm");
+          } else {
+            Format(instr, "vrintr'cond.f32.f32 'Sd, 'Sm");
+          }
+        }
       } else {
         Unknown(instr);  // Not used by V8.
       }
@@ -1627,6 +1644,50 @@ void Decoder::DecodeSpecialCondition(Instruction* instr) {
         Unknown(instr);
       }
       break;
+    case 0x1D:
+      if (instr->Opc1Value() == 0x7 && instr->Bits(19, 18) == 0x2 &&
+          instr->Bits(11, 9) == 0x5 && instr->Bits(7, 6) == 0x1 &&
+          instr->Bit(4) == 0x0) {
+        // VRINTA, VRINTN, VRINTP, VRINTM (floating-point)
+        bool dp_operation = (instr->SzValue() == 1);
+        int rounding_mode = instr->Bits(17, 16);
+        switch (rounding_mode) {
+          case 0x0:
+            if (dp_operation) {
+              Format(instr, "vrinta.f64.f64 'Dd, 'Dm");
+            } else {
+              Format(instr, "vrinta.f32.f32 'Sd, 'Sm");

[Rodolph Perfetta (ARM), 2014/10/28 19:41:41]

You don't implement single precision, so I would handle them as unknown
instructions.

Same apply for vrintn/p/m below.

[sigurds, 2014/10/29 11:47:15]

Done.

+            }
+            break;
+          case 0x1:
+            if (dp_operation) {
+              Format(instr, "vrintn.f64.f64 'Dd, 'Dm");
+            } else {
+              Format(instr, "vrintn.f32.f32 'Sd, 'Sm");
+            }
+            break;
+          case 0x2:
+            if (dp_operation) {
+              Format(instr, "vrintp.f64.f64 'Dd, 'Dm");
+            } else {
+              Format(instr, "vrintp.f32.f32 'Sd, 'Sm");
+            }
+            break;
+          case 0x3:
+            if (dp_operation) {
+              Format(instr, "vrintm.f64.f64 'Dd, 'Dm");
+            } else {
+              Format(instr, "vrintm.f32.f32 'Sd, 'Sm");
+            }
+            break;
+          default:
+            UNREACHABLE();  // Case analysis is exhaustive.
+            break;
+        }
+      } else {
+        Unknown(instr);
+      }
+      break;
     default:
       Unknown(instr);
       break;