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Issue 682643002: Add vrint{a,n,p,m,z} instructions to arm assembler. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Addressing more comments. Created 6 years, 1 month ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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679 "eebd0be0 vcvt.s32.f64 s0, d16"); 679 "eebd0be0 vcvt.s32.f64 s0, d16");
680 COMPARE(vcvt_f64_u32(d16, s1), 680 COMPARE(vcvt_f64_u32(d16, s1),
681 "eef80b60 vcvt.f64.u32 d16, s1"); 681 "eef80b60 vcvt.f64.u32 d16, s1");
682 } 682 }
683 } 683 }
684 684
685 VERIFY_RUN(); 685 VERIFY_RUN();
686 } 686 }
687 687
688 688
689 TEST(ARMv8_vrintX_disasm) {
690 SET_UP();
691 if (CpuFeatures::IsSupported(ARMv8)) {
692 COMPARE(vrinta(d0, d0), "feb80b40 vrinta.f64.f64 d0, d0");
693 COMPARE(vrinta(d2, d3), "feb82b43 vrinta.f64.f64 d2, d3");
694
695 COMPARE(vrintp(d0, d0), "feba0b40 vrintp.f64.f64 d0, d0");
696 COMPARE(vrintp(d2, d3), "feba2b43 vrintp.f64.f64 d2, d3");
697
698 COMPARE(vrintn(d0, d0), "feb90b40 vrintn.f64.f64 d0, d0");
699 COMPARE(vrintn(d2, d3), "feb92b43 vrintn.f64.f64 d2, d3");
700
701 COMPARE(vrintm(d0, d0), "febb0b40 vrintm.f64.f64 d0, d0");
702 COMPARE(vrintm(d2, d3), "febb2b43 vrintm.f64.f64 d2, d3");
703
704 COMPARE(vrintz(d0, d0), "eeb60bc0 vrintz.f64.f64 d0, d0");
705 COMPARE(vrintz(d2, d3, ne), "1eb62bc3 vrintzne.f64.f64 d2, d3");
706 }
707
708 VERIFY_RUN();
709 }
710
711
689 TEST(Neon) { 712 TEST(Neon) {
690 SET_UP(); 713 SET_UP();
691 714
692 if (CpuFeatures::IsSupported(NEON)) { 715 if (CpuFeatures::IsSupported(NEON)) {
693 CpuFeatureScope scope(&assm, NEON); 716 CpuFeatureScope scope(&assm, NEON);
694 COMPARE(vld1(Neon8, NeonListOperand(d4, 4), NeonMemOperand(r1)), 717 COMPARE(vld1(Neon8, NeonListOperand(d4, 4), NeonMemOperand(r1)),
695 "f421420f vld1.8 {d4, d5, d6, d7}, [r1]"); 718 "f421420f vld1.8 {d4, d5, d6, d7}, [r1]");
696 COMPARE(vst1(Neon16, NeonListOperand(d17, 4), NeonMemOperand(r9)), 719 COMPARE(vst1(Neon16, NeonListOperand(d17, 4), NeonMemOperand(r9)),
697 "f449124f vst1.16 {d17, d18, d19, d20}, [r9]"); 720 "f449124f vst1.16 {d17, d18, d19, d20}, [r9]");
698 COMPARE(vmovl(NeonU8, q3, d1), 721 COMPARE(vmovl(NeonU8, q3, d1),
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903 "e16dc7ff strd ip, [sp, #-127]!"); 926 "e16dc7ff strd ip, [sp, #-127]!");
904 927
905 COMPARE(pld(MemOperand(r1, 0)), 928 COMPARE(pld(MemOperand(r1, 0)),
906 "f5d1f000 pld [r1]"); 929 "f5d1f000 pld [r1]");
907 COMPARE(pld(MemOperand(r2, 128)), 930 COMPARE(pld(MemOperand(r2, 128)),
908 "f5d2f080 pld [r2, #+128]"); 931 "f5d2f080 pld [r2, #+128]");
909 } 932 }
910 933
911 VERIFY_RUN(); 934 VERIFY_RUN();
912 } 935 }
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