Add vrint{a,n,p,m,z} instructions to arm assembler.

src/arm/simulator-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <stdarg.h>
 #include <stdlib.h>
 #include <cmath>
 
 #include "src/v8.h"
 
@@ skipping 2939 matching lines @@
         double dd_value = std::sqrt(dm_value);
         dd_value = canonicalizeNaN(dd_value);
         set_d_register_from_double(vd, dd_value);
       } else if (instr->Opc3Value() == 0x0) {
         // vmov immediate.
         if (instr->SzValue() == 0x1) {
           set_d_register_from_double(vd, instr->DoubleImmedVmov());
         } else {
           UNREACHABLE();  // Not used by v8.
         }
+      } else if (((instr->Opc2Value() == 0x6)) && (instr->Opc3Value() == 0x3)) {
+        // vrintz - truncate
+        double dm_value = get_double_from_d_register(vm);
+        double dd_value = std::trunc(dm_value);
+        dd_value = canonicalizeNaN(dd_value);
+        set_d_register_from_double(vd, dd_value);
       } else {
         UNREACHABLE();  // Not used by V8.
       }
     } else if (instr->Opc1Value() == 0x3) {
       if (instr->SzValue() != 0x1) {
         UNREACHABLE();  // Not used by V8.
       }
 
       if (instr->Opc3Value() & 0x1) {
         // vsub
@@ skipping 630 matching lines @@
       }
       break;
     case 0xA:
     case 0xB:
       if ((instr->Bits(22, 20) == 5) && (instr->Bits(15, 12) == 0xf)) {
         // pld: ignore instruction.
       } else {
         UNIMPLEMENTED();
       }
       break;
+    case 0x1D:
+      if (instr->Opc1Value() == 0x7 && instr->Opc3Value() == 0x1 &&
+          instr->Bits(11, 9) == 0x5 && instr->Bits(19, 18) == 0x2 &&
+          instr->Bit(8) == 0x1) {
+        int vm = instr->VFPMRegValue(kDoublePrecision);
+        int vd = instr->VFPDRegValue(kDoublePrecision);
+        double dm_value = get_double_from_d_register(vm);
+        double dd_value = 0.0;
+        int rounding_mode = instr->Bits(17, 16);
+        switch (rounding_mode) {
+          case 0x0:  // vrinta - round with ties to away from zero
+            dd_value = std::round(dm_value);

[Torne, 2014/11/04 16:28:55]

The calls to std::round and std::trunc added here require a C++11 standard
library, as those were not available in the std:: namespace previously. This
broke building the android webview on mac where the default C++ library is still
the crappy old one from gcc 4.2 :/

I'm investigating fixing the android build system downstream to use libc++ to
avoid issues like this in the future, but is this dependency against the current
chromium policy of not depending on C++11 library features? Does V8 follow that
policy?

I'm not insisting this be changed, just pointing it out in case it was
accidental. If it's fine, then we'll get it dealt with downstream.

[Sven Panne, 2014/11/05 08:05:00]

Yes, we follow this policy, and normally this kind of problems shows up on our
Mac builders which use an ancient XCode. But this is ARM-specific, so it slipped
through and we should remove those calls in v8.

+            break;
+          case 0x1: {  // vrintn - round with ties to even
+            dd_value = std::floor(dm_value);
+            double error = dm_value - dd_value;
+            // Take care of correctly handling the range [-0.5, -0.0], which
+            // must yield -0.0.
+            if ((-0.5 <= dm_value) && (dm_value < 0.0)) {
+              dd_value = -0.0;
+              // If the error is greater than 0.5, or is equal to 0.5 and the
+              // integer result is odd, round up.
+            } else if ((error > 0.5) ||
+                       ((error == 0.5) && (fmod(dd_value, 2) != 0))) {
+              dd_value++;
+            }
+            break;
+          }
+          case 0x2:  // vrintp - ceil
+            dd_value = std::ceil(dm_value);
+            break;
+          case 0x3:  // vrintm - floor
+            dd_value = std::floor(dm_value);
+            break;
+          default:
+            UNREACHABLE();  // Case analysis is exhaustive.
+            break;
+        }
+        dd_value = canonicalizeNaN(dd_value);
+        set_d_register_from_double(vd, dd_value);
+      } else {
+        UNIMPLEMENTED();
+      }
+      break;
     default:
       UNIMPLEMENTED();
       break;
   }
 }
 
 
 // Executes the current instruction.
 void Simulator::InstructionDecode(Instruction* instr) {
   if (v8::internal::FLAG_check_icache) {
@@ skipping 230 matching lines @@
   uintptr_t address = *stack_slot;
   set_register(sp, current_sp + sizeof(uintptr_t));
   return address;
 }
 
 } }  // namespace v8::internal
 
 #endif  // USE_SIMULATOR
 
 #endif  // V8_TARGET_ARCH_ARM