Subzero: Refactor newline emission for Inst::emit().

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 392 matching lines @@
 } // end of anonymous namespace
 
 void InstX8632::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "[X8632] ";
   Inst::dump(Func);
 }
 
 void InstX8632Label::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
-  Str << getName(Func) << ":\n";
+  Str << getName(Func) << ":";
 }
 
 void InstX8632Label::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   Asm->BindLocalLabel(Number);
   // TODO(jvoung): remove the the textual label once forward branch
   // fixups are used (and text assembler is not used).
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << getName(Func) << ":\n";
 }
 
 void InstX8632Label::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << getName(Func) << ":";
 }
 
 void InstX8632Br::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\t";
 
   if (Condition == CondX86::Br_None) {
     Str << "jmp";
   } else {
     Str << InstX8632BrAttributes[Condition].EmitString;
   }
 
   if (Label) {
-    Str << "\t" << Label->getName(Func) << "\n";
+    Str << "\t" << Label->getName(Func);
   } else {
     if (Condition == CondX86::Br_None) {
-      Str << "\t" << getTargetFalse()->getAsmName() << "\n";
+      Str << "\t" << getTargetFalse()->getAsmName();
     } else {
-      Str << "\t" << getTargetTrue()->getAsmName() << "\n";
+      Str << "\t" << getTargetTrue()->getAsmName();
       if (getTargetFalse()) {
-        Str << "\tjmp\t" << getTargetFalse()->getAsmName() << "\n";
+        Str << "\n\tjmp\t" << getTargetFalse()->getAsmName();
       }
     }
   }
 }
 
 void InstX8632Br::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   if (Label) {
     x86::Label *L = Asm->GetOrCreateLocalLabel(Label->getNumber());
@@ skipping 52 matching lines @@
       Str << ", label %" << getTargetFalse()->getName();
     }
   }
 }
 
 void InstX8632Call::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tcall\t";
   getCallTarget()->emit(Func);
-  Str << "\n";
   Func->getTarget()->resetStackAdjustment();
 }
 
 void InstX8632Call::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Operand *Target = getCallTarget();
   bool NeedsFallback = false;
   if (const auto Var = llvm::dyn_cast<Variable>(Target)) {
     if (Var->hasReg()) {
@@ skipping 23 matching lines @@
     llvm_unreachable("Unexpected operand type");
   }
   if (NeedsFallback) {
     // TODO(jvoung): The ".long sym" hack doesn't work, since we need
     // a pc-rel relocation and not an absolute relocation.
     //
     // Still, we have at least filled the assembler buffer so that the
     // instruction sizes/positions are correct for jumps.
     // For now, fall back to the regular .s emission, after filling the buffer.
     emit(Func);
+    Func->getContext()->getStrEmit() << "\n";
   } else {
     emitIASBytes(Func, Asm, StartPosition);
   }
   Func->getTarget()->resetStackAdjustment();
 }
 
 void InstX8632Call::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   if (getDest()) {
     dumpDest(Func);
@@ skipping 18 matching lines @@
   bool EmittedSrc1 = false;
   if (ShiftHack) {
     Variable *ShiftReg = llvm::dyn_cast<Variable>(Inst->getSrc(1));
     if (ShiftReg && ShiftReg->getRegNum() == RegX8632::Reg_ecx) {
       Str << "cl";
       EmittedSrc1 = true;
     }
   }
   if (!EmittedSrc1)
     Inst->getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 void emitIASOpTyGPR(const Cfg *Func, Type Ty, const Operand *Op,
                     const x86::AssemblerX86::GPREmitterOneOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   if (const auto Var = llvm::dyn_cast<Variable>(Op)) {
     if (Var->hasReg()) {
       // We cheat a little and use GPRRegister even for byte operations.
       RegX8632::GPRRegister VarReg =
@@ skipping 526 matching lines @@
 
 template <> void InstX8632Sqrtss::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Type Ty = getSrc(0)->getType();
   assert(isScalarFloatingType(Ty));
   Str << "\tsqrt" << TypeX8632Attributes[Ty].SdSsString << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
-  Str << "\n";
 }
 
 template <> void InstX8632Addss::emit(const Cfg *Func) const {
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "add%s",
            TypeX8632Attributes[getDest()->getType()].SdSsString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Padd::emit(const Cfg *Func) const {
@@ skipping 68 matching lines @@
   snprintf(buf, llvm::array_lengthof(buf), "div%s",
            TypeX8632Attributes[getDest()->getType()].SdSsString);
   emitTwoAddress(buf, this, Func);
 }
 
 template <> void InstX8632Div::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   Str << "\t" << Opcode << "\t";
   getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 template <> void InstX8632Div::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 3);
   const Operand *Src = getSrc(1);
   Type Ty = Src->getType();
   const static x86::AssemblerX86::GPREmitterOneOp Emitter = {
       &x86::AssemblerX86::div, &x86::AssemblerX86::div};
   emitIASOpTyGPR(Func, Ty, Src, Emitter);
 }
 
 template <> void InstX8632Idiv::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   Str << "\t" << Opcode << "\t";
   getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 template <> void InstX8632Idiv::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 3);
   const Operand *Src = getSrc(1);
   Type Ty = Src->getType();
   const static x86::AssemblerX86::GPREmitterOneOp Emitter = {
       &x86::AssemblerX86::idiv, &x86::AssemblerX86::idiv};
   emitIASOpTyGPR(Func, Ty, Src, Emitter);
 }
 
 namespace {
 
 // pblendvb and blendvps take xmm0 as a final implicit argument.
 void emitVariableBlendInst(const char *Opcode, const Inst *Inst,
                            const Cfg *Func) {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(Inst->getSrcSize() == 3);
   assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() ==
          RegX8632::Reg_xmm0);
   Str << "\t" << Opcode << "\t";
   Inst->getDest()->emit(Func);
   Str << ", ";
   Inst->getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 void
 emitIASVariableBlendInst(const Inst *Inst, const Cfg *Func,
                          const x86::AssemblerX86::XmmEmitterRegOp &Emitter) {
   assert(Inst->getSrcSize() == 3);
   assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() ==
          RegX8632::Reg_xmm0);
   const Variable *Dest = Inst->getDest();
   const Operand *Src = Inst->getSrc(1);
@@ skipping 33 matching lines @@
 template <> void InstX8632Imul::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   if (isByteSizedArithType(getDest()->getType())) {
     // The 8-bit version of imul only allows the form "imul r/m8".
     Variable *Src0 = llvm::dyn_cast<Variable>(getSrc(0));
     (void)Src0;
     assert(Src0 && Src0->getRegNum() == RegX8632::Reg_eax);
     Str << "\timul\t";
     getSrc(1)->emit(Func);
-    Str << "\n";
   } else if (llvm::isa<Constant>(getSrc(1))) {
     Str << "\timul\t";
     getDest()->emit(Func);
     Str << ", ";
     getSrc(0)->emit(Func);
     Str << ", ";
     getSrc(1)->emit(Func);
-    Str << "\n";
   } else {
     emitTwoAddress("imul", this, Func);
   }
 }
 
 template <> void InstX8632Imul::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   const Variable *Var = getDest();
   Type Ty = Var->getType();
   const Operand *Src = getSrc(1);
@@ skipping 36 matching lines @@
   assert(getSrcSize() == 1);
   Operand *Src0 = getSrc(0);
   assert(llvm::isa<Variable>(Src0));
   assert(llvm::cast<Variable>(Src0)->getRegNum() == RegX8632::Reg_eax);
   switch (Src0->getType()) {
   default:
     llvm_unreachable("unexpected source type!");
     break;
   case IceType_i8:
     assert(getDest()->getRegNum() == RegX8632::Reg_eax);
-    Str << "\tcbw\n";
+    Str << "\tcbw";
     break;
   case IceType_i16:
     assert(getDest()->getRegNum() == RegX8632::Reg_edx);
-    Str << "\tcwd\n";
+    Str << "\tcwd";
     break;
   case IceType_i32:
     assert(getDest()->getRegNum() == RegX8632::Reg_edx);
-    Str << "\tcdq\n";
+    Str << "\tcdq";
     break;
   }
 }
 
 template <> void InstX8632Cbwdq::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(getSrcSize() == 1);
   Operand *Src0 = getSrc(0);
   assert(llvm::isa<Variable>(Src0));
@@ skipping 19 matching lines @@
 }
 
 void InstX8632Mul::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(llvm::isa<Variable>(getSrc(0)));
   assert(llvm::dyn_cast<Variable>(getSrc(0))->getRegNum() == RegX8632::Reg_eax);
   assert(getDest()->getRegNum() == RegX8632::Reg_eax); // TODO: allow edx?
   Str << "\tmul\t";
   getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Mul::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   assert(llvm::isa<Variable>(getSrc(0)));
   assert(llvm::dyn_cast<Variable>(getSrc(0))->getRegNum() == RegX8632::Reg_eax);
   assert(getDest()->getRegNum() == RegX8632::Reg_eax); // TODO: allow edx?
   const Operand *Src = getSrc(1);
   Type Ty = Src->getType();
   const static x86::AssemblerX86::GPREmitterOneOp Emitter = {
@@ skipping 17 matching lines @@
   Str << ", ";
   getSrc(1)->emit(Func);
   Str << ", ";
   if (Variable *ShiftReg = llvm::dyn_cast<Variable>(getSrc(2))) {
     (void)ShiftReg;
     assert(ShiftReg->getRegNum() == RegX8632::Reg_ecx);
     Str << "cl";
   } else {
     getSrc(2)->emit(Func);
   }
-  Str << "\n";
 }
 
 void InstX8632Shld::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 3);
   assert(getDest() == getSrc(0));
   const Variable *Dest = getDest();
   const Operand *Src1 = getSrc(1);
   const Operand *Src2 = getSrc(2);
   static const x86::AssemblerX86::GPREmitterShiftD Emitter = {
       &x86::AssemblerX86::shld, &x86::AssemblerX86::shld};
@@ skipping 16 matching lines @@
   Str << ", ";
   getSrc(1)->emit(Func);
   Str << ", ";
   if (Variable *ShiftReg = llvm::dyn_cast<Variable>(getSrc(2))) {
     (void)ShiftReg;
     assert(ShiftReg->getRegNum() == RegX8632::Reg_ecx);
     Str << "cl";
   } else {
     getSrc(2)->emit(Func);
   }
-  Str << "\n";
 }
 
 void InstX8632Shrd::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 3);
   assert(getDest() == getSrc(0));
   const Variable *Dest = getDest();
   const Operand *Src1 = getSrc(1);
   const Operand *Src2 = getSrc(2);
   static const x86::AssemblerX86::GPREmitterShiftD Emitter = {
       &x86::AssemblerX86::shrd, &x86::AssemblerX86::shrd};
   emitIASGPRShiftDouble(Func, Dest, Src1, Src2, Emitter);
 }
 
 void InstX8632Shrd::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   dumpDest(Func);
   Str << " = shrd." << getDest()->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Cmov::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\t";
   assert(Condition != CondX86::Br_None);
   assert(getDest()->hasReg());
   Str << "cmov" << InstX8632BrAttributes[Condition].DisplayString << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Cmov::emitIAS(const Cfg *Func) const {
   assert(Condition != CondX86::Br_None);
   assert(getDest()->hasReg());
   assert(getSrcSize() == 2);
   // Only need the reg/reg form now.
   const Variable *Src = llvm::cast<Variable>(getSrc(1));
   assert(Src->hasReg());
   assert(Src->getType() == IceType_i32);
@@ skipping 16 matching lines @@
 void InstX8632Cmpps::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(Condition < CondX86::Cmpps_Invalid);
   Str << "\t";
   Str << "cmp" << InstX8632CmppsAttributes[Condition].EmitString << "ps"
       << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Cmpps::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(getSrcSize() == 2);
   assert(Condition < CondX86::Cmpps_Invalid);
   // Assuming there isn't any load folding for cmpps, and vector constants
   // are not allowed in PNaCl.
   assert(llvm::isa<Variable>(getSrc(1)));
@@ skipping 22 matching lines @@
 void InstX8632Cmpxchg::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\tcmpxchg\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(2)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Cmpxchg::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 3);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Type Ty = getSrc(0)->getType();
   const OperandX8632Mem *Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
@@ skipping 19 matching lines @@
 }
 
 void InstX8632Cmpxchg8b::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 5);
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\tcmpxchg8b\t";
   getSrc(0)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Cmpxchg8b::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 5);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   const OperandX8632Mem *Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
   if (Locked) {
@@ skipping 16 matching lines @@
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tcvt";
   if (isTruncating())
     Str << "t";
   Str << TypeX8632Attributes[getSrc(0)->getType()].CvtString << "2"
       << TypeX8632Attributes[getDest()->getType()].CvtString << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Cvt::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 1);
   const Variable *Dest = getDest();
   const Operand *Src = getSrc(0);
   Type DestTy = Dest->getType();
   Type SrcTy = Src->getType();
   switch (Variant) {
   case Si2ss: {
@@ skipping 59 matching lines @@
   dumpSources(Func);
 }
 
 void InstX8632Icmp::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\tcmp\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Icmp::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   const Operand *Src0 = getSrc(0);
   const Operand *Src1 = getSrc(1);
   Type Ty = Src0->getType();
   static const x86::AssemblerX86::GPREmitterRegOp RegEmitter = {
     &x86::AssemblerX86::cmp, &x86::AssemblerX86::cmp, &x86::AssemblerX86::cmp
   };
@@ skipping 16 matching lines @@
 }
 
 void InstX8632Ucomiss::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\tucomi" << TypeX8632Attributes[getSrc(0)->getType()].SdSsString
       << "\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Ucomiss::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   // Currently src0 is always a variable by convention, to avoid having
   // two memory operands.
   assert(llvm::isa<Variable>(getSrc(0)));
   const Variable *Src0 = llvm::cast<Variable>(getSrc(0));
   Type Ty = Src0->getType();
   const static x86::AssemblerX86::XmmEmitterRegOp Emitter = {
     &x86::AssemblerX86::ucomiss, &x86::AssemblerX86::ucomiss
   };
   emitIASRegOpTyXMM(Func, Ty, Src0, getSrc(1), Emitter);
 }
 
 void InstX8632Ucomiss::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "ucomiss." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632UD2::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
-  Str << "\tud2\n";
+  Str << "\tud2";
 }
 
 void InstX8632UD2::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Asm->ud2();
   emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632UD2::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "ud2\n";
 }
 
 void InstX8632Test::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\ttest\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Test::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   const Operand *Src0 = getSrc(0);
   const Operand *Src1 = getSrc(1);
   Type Ty = Src0->getType();
   // The Reg/Addr form of test is not encodeable.
   static const x86::AssemblerX86::GPREmitterRegOp RegEmitter = {
     &x86::AssemblerX86::test, NULL, &x86::AssemblerX86::test
@@ skipping 13 matching lines @@
 
 void InstX8632Test::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "test." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Mfence::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
-  Str << "\tmfence\n";
+  Str << "\tmfence";
 }
 
 void InstX8632Mfence::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Asm->mfence();
   emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Mfence::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "mfence\n";
 }
 
 void InstX8632Store::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\tmov" << TypeX8632Attributes[getSrc(0)->getType()].SdSsString
       << "\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Store::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   const Operand *Dest = getSrc(1);
   const Operand *Src = getSrc(0);
   Type DestTy = Dest->getType();
   if (isScalarFloatingType(DestTy)) {
     // Src must be a register, since Dest is a Mem operand of some kind.
     const Variable *SrcVar = llvm::cast<Variable>(Src);
@@ skipping 29 matching lines @@
   getSrc(0)->dump(Func);
 }
 
 void InstX8632StoreP::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   Str << "\tmovups\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632StoreP::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(getSrcSize() == 2);
   const Variable *Src = llvm::cast<Variable>(getSrc(0));
   const OperandX8632Mem *DestMem = llvm::cast<OperandX8632Mem>(getSrc(1));
   assert(DestMem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   assert(Src->hasReg());
@@ skipping 12 matching lines @@
 
 void InstX8632StoreQ::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(getSrc(1)->getType() == IceType_i64 ||
          getSrc(1)->getType() == IceType_f64);
   Str << "\tmovq\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632StoreQ::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(getSrcSize() == 2);
   const Variable *Src = llvm::cast<Variable>(getSrc(0));
   const OperandX8632Mem *DestMem = llvm::cast<OperandX8632Mem>(getSrc(1));
   assert(DestMem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   assert(Src->hasReg());
@@ skipping 19 matching lines @@
   Str << ", ";
   Operand *Src0 = getSrc(0);
   if (Variable *VSrc0 = llvm::dyn_cast<Variable>(Src0)) {
     Type Ty = VSrc0->getType();
     // lea on x86-32 doesn't accept mem128 operands, so cast VSrc0 to an
     // acceptable type.
     VSrc0->asType(isVectorType(Ty) ? IceType_i32 : Ty).emit(Func);
   } else {
     Src0->emit(Func);
   }
-  Str << "\n";
 }
 
 template <> void InstX8632Mov::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Operand *Src = getSrc(0);
   // The llvm-mc assembler using Intel syntax has a bug in which "mov
   // reg, RelocatableConstant" does not generate the right instruction
   // with a relocation.  To work around, we emit "lea reg,
   // RelocatableConstant".  Also, the lowering and legalization is
@@ skipping 23 matching lines @@
   // TODO: This assert disallows usages such as copying a floating point
   // value between a vector and a scalar (which movss is used for).
   // Clean this up.
   assert(Func->getTarget()->typeWidthInBytesOnStack(getDest()->getType()) ==
          Func->getTarget()->typeWidthInBytesOnStack(Src->getType()));
   if (UseLeaHack) {
     Src->emit(Func);
     Str << ", %";
     getDest()->emit(Func);
     Str << "\n";
-    Str << ".intel_syntax\n";
+    Str << ".intel_syntax";
   } else {
     getDest()->asType(Src->getType()).emit(Func);
     Str << ", ";
     Src->emit(Func);
-    Str << "\n";
   }
 }
 
 template <> void InstX8632Mov::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 1);
   const Variable *Dest = getDest();
   const Operand *Src = getSrc(0);
   Type DestTy = Dest->getType();
   Type SrcTy = Src->getType();
   // Mov can be used for GPRs or XMM registers. Also, the type does not
@@ skipping 100 matching lines @@
   // TODO(wala,stichnot): movups works with all vector operands, but
   // there exist other instructions (movaps, movdqa, movdqu) that may
   // perform better, depending on the data type and alignment of the
   // operands.
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tmovups\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
-  Str << "\n";
 }
 
 template <> void InstX8632Movp::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 1);
   assert(isVectorType(getDest()->getType()));
   const Variable *Dest = getDest();
   const Operand *Src = getSrc(0);
   const static x86::AssemblerX86::XmmEmitterMovOps Emitter = {
     &x86::AssemblerX86::movups, &x86::AssemblerX86::movups,
     &x86::AssemblerX86::movups
   };
   emitIASMovlikeXMM(Func, Dest, Src, Emitter);
 }
 
 template <> void InstX8632Movq::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   assert(getDest()->getType() == IceType_i64 ||
          getDest()->getType() == IceType_f64);
   Str << "\tmovq\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
-  Str << "\n";
 }
 
 template <> void InstX8632Movq::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 1);
   assert(getDest()->getType() == IceType_i64 ||
          getDest()->getType() == IceType_f64);
   const Variable *Dest = getDest();
   const Operand *Src = getSrc(0);
   const static x86::AssemblerX86::XmmEmitterMovOps Emitter = {
     &x86::AssemblerX86::movq, &x86::AssemblerX86::movq, &x86::AssemblerX86::movq
@@ skipping 35 matching lines @@
   const Operand *Src = getSrc(0);
   Type SrcTy = Src->getType();
   assert(typeWidthInBytes(Dest->getType()) > 1);
   assert(typeWidthInBytes(Dest->getType()) > typeWidthInBytes(SrcTy));
   emitIASRegOpTyGPR<false, true>(Func, SrcTy, Dest, Src, Emitter);
 }
 
 void InstX8632Nop::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   // TODO: Emit the right code for each variant.
-  Str << "\tnop\t# variant = " << Variant << "\n";
+  Str << "\tnop\t# variant = " << Variant;
 }
 
 void InstX8632Nop::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   // TODO: Emit the right code for the variant.
   Asm->nop();
   emitIASBytes(Func, Asm, StartPosition);
 }
 
@@ skipping 10 matching lines @@
   if (Var && Var->hasReg()) {
     // This is a physical xmm register, so we need to spill it to a
     // temporary stack slot.
     SizeT Width = typeWidthInBytes(Ty);
     Str << "\tsub\tesp, " << Width << "\n";
     Str << "\tmov" << TypeX8632Attributes[Ty].SdSsString << "\t"
         << TypeX8632Attributes[Ty].WidthString << " [esp], ";
     Var->emit(Func);
     Str << "\n";
     Str << "\tfld\t" << TypeX8632Attributes[Ty].WidthString << " [esp]\n";
-    Str << "\tadd\tesp, " << Width << "\n";
+    Str << "\tadd\tesp, " << Width;
     return;
   }
   Str << "\tfld\t";
   getSrc(0)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Fld::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(getSrcSize() == 1);
   const Operand *Src = getSrc(0);
   Type Ty = Src->getType();
   if (const auto Var = llvm::dyn_cast<Variable>(Src)) {
     if (Var->hasReg()) {
@@ skipping 28 matching lines @@
 }
 
 void InstX8632Fstp::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   // TODO(jvoung,stichnot): Utilize this by setting Dest to NULL to
   // "partially" delete the fstp if the Dest is unused.
   // Even if Dest is unused, the fstp should be kept for the SideEffects
   // of popping the stack.
   if (getDest() == NULL) {
-    Str << "\tfstp\tst(0)\n";
+    Str << "\tfstp\tst(0)";
     return;
   }
   if (!getDest()->hasReg()) {
     Str << "\tfstp\t";
     getDest()->emit(Func);
-    Str << "\n";
     return;
   }
   // Dest is a physical (xmm) register, so st(0) needs to go through
   // memory.  Hack this by creating a temporary stack slot, spilling
   // st(0) there, loading it into the xmm register, and deallocating
   // the stack slot.
   Type Ty = getDest()->getType();
   size_t Width = typeWidthInBytes(Ty);
   Str << "\tsub\tesp, " << Width << "\n";
   Str << "\tfstp\t" << TypeX8632Attributes[Ty].WidthString << " [esp]\n";
   Str << "\tmov" << TypeX8632Attributes[Ty].SdSsString << "\t";
   getDest()->emit(Func);
   Str << ", " << TypeX8632Attributes[Ty].WidthString << " [esp]\n";
-  Str << "\tadd\tesp, " << Width << "\n";
+  Str << "\tadd\tesp, " << Width;
 }
 
 void InstX8632Fstp::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(getSrcSize() == 0);
   const Variable *Dest = getDest();
   // TODO(jvoung,stichnot): Utilize this by setting Dest to NULL to
   // "partially" delete the fstp if the Dest is unused.
   // Even if Dest is unused, the fstp should be kept for the SideEffects
@@ skipping 57 matching lines @@
   Variable *Dest = getDest();
   // pextrw must take a register dest. There is an SSE4.1 version that takes
   // a memory dest, but we aren't using it. For uniformity, just restrict
   // them all to have a register dest for now.
   assert(Dest->hasReg());
   Dest->asType(IceType_i32).emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 template <> void InstX8632Pextr::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   // pextrb and pextrd are SSE4.1 instructions.
   const Variable *Dest = getDest();
   Type DispatchTy = Dest->getType();
   assert(DispatchTy == IceType_i16 ||
          static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
              TargetX8632::SSE4_1);
@@ skipping 29 matching lines @@
     if (VSrc1->hasReg()) {
       VSrc1->asType(IceType_i32).emit(Func);
     } else {
       VSrc1->emit(Func);
     }
   } else {
     Src1->emit(Func);
   }
   Str << ", ";
   getSrc(2)->emit(Func);
-  Str << "\n";
 }
 
 template <> void InstX8632Pinsr::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 3);
   assert(getDest() == getSrc(0));
   // pinsrb and pinsrd are SSE4.1 instructions.
   const Operand *Src0 = getSrc(1);
   Type DispatchTy = Src0->getType();
   assert(DispatchTy == IceType_i16 ||
          static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
@@ skipping 33 matching lines @@
   emitIASThreeOpImmOps<RegX8632::XmmRegister, RegX8632::XmmRegister,
                        RegX8632::getEncodedXmm, RegX8632::getEncodedXmm>(
       Func, Ty, Dest, getSrc(1), getSrc(2), Emitter);
 }
 
 void InstX8632Pop::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   Str << "\tpop\t";
   getDest()->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Pop::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 0);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   if (getDest()->hasReg()) {
     Asm->popl(RegX8632::getEncodedGPR(getDest()->getRegNum()));
   } else {
     Asm->popl(static_cast<TargetX8632 *>(Func->getTarget())
                   ->stackVarToAsmOperand(getDest()));
   }
   emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Pop::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   dumpDest(Func);
   Str << " = pop." << getDest()->getType() << " ";
 }
 
 void InstX8632AdjustStack::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
-  Str << "\tsub\tesp, " << Amount << "\n";
+  Str << "\tsub\tesp, " << Amount;
   Func->getTarget()->updateStackAdjustment(Amount);
 }
 
 void InstX8632AdjustStack::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Asm->sub(IceType_i32, RegX8632::Encoded_Reg_esp, x86::Immediate(Amount));
   emitIASBytes(Func, Asm, StartPosition);
   Func->getTarget()->updateStackAdjustment(Amount);
 }
 
 void InstX8632AdjustStack::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "esp = sub.i32 esp, " << Amount;
 }
 
 void InstX8632Push::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   // Push is currently only used for saving GPRs.
   Variable *Var = llvm::cast<Variable>(getSrc(0));
   assert(Var->hasReg());
   Str << "\tpush\t";
   Var->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Push::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 1);
   // Push is currently only used for saving GPRs.
   Variable *Var = llvm::cast<Variable>(getSrc(0));
   assert(Var->hasReg());
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Asm->pushl(RegX8632::getEncodedGPR(Var->getRegNum()));
@@ skipping 23 matching lines @@
          getDest()->getType() == IceType_v4i32 ||
          getDest()->getType() == IceType_v4i1);
   char buf[30];
   snprintf(buf, llvm::array_lengthof(buf), "psra%s",
            TypeX8632Attributes[getDest()->getType()].PackString);
   emitTwoAddress(buf, this, Func);
 }
 
 void InstX8632Ret::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
-  Str << "\tret\n";
+  Str << "\tret";
 }
 
 void InstX8632Ret::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Asm->ret();
   emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Ret::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Type Ty = (getSrcSize() == 0 ? IceType_void : getSrc(0)->getType());
   Str << "ret." << Ty << " ";
   dumpSources(Func);
 }
 
 void InstX8632Xadd::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\txadd\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Xadd::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Type Ty = getSrc(0)->getType();
   const OperandX8632Mem *Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
@@ skipping 17 matching lines @@
   Str << "xadd." << Ty << " ";
   dumpSources(Func);
 }
 
 void InstX8632Xchg::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\txchg\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
-  Str << "\n";
 }
 
 void InstX8632Xchg::emitIAS(const Cfg *Func) const {
   assert(getSrcSize() == 2);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Type Ty = getSrc(0)->getType();
   const OperandX8632Mem *Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
   assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
@@ skipping 192 matching lines @@
   }
   Str << "(";
   if (Func)
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // end of namespace Ice