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Side by Side Diff: src/compiler/mips/instruction-selector-mips.cc

Issue 680833005: MIPS: Add floor, ceil, round (truncate) instructions for ia32, x64 (if SSE4.1) and add floor, ceil,… (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: supported on r6 also. Created 6 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/bits.h" 5 #include "src/base/bits.h"
6 #include "src/compiler/instruction-selector-impl.h" 6 #include "src/compiler/instruction-selector-impl.h"
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
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49 } 49 }
50 50
51 private: 51 private:
52 bool ImmediateFitsAddrMode1Instruction(int32_t imm) const { 52 bool ImmediateFitsAddrMode1Instruction(int32_t imm) const {
53 TRACE_UNIMPL(); 53 TRACE_UNIMPL();
54 return false; 54 return false;
55 } 55 }
56 }; 56 };
57 57
58 58
59 static void VisitRR(InstructionSelector* selector, ArchOpcode opcode,
60 Node* node) {
61 MipsOperandGenerator g(selector);
62 selector->Emit(opcode, g.DefineAsRegister(node),
63 g.UseRegister(node->InputAt(0)));
64 }
65
66
59 static void VisitRRR(InstructionSelector* selector, ArchOpcode opcode, 67 static void VisitRRR(InstructionSelector* selector, ArchOpcode opcode,
60 Node* node) { 68 Node* node) {
61 MipsOperandGenerator g(selector); 69 MipsOperandGenerator g(selector);
62 selector->Emit(opcode, g.DefineAsRegister(node), 70 selector->Emit(opcode, g.DefineAsRegister(node),
63 g.UseRegister(node->InputAt(0)), 71 g.UseRegister(node->InputAt(0)),
64 g.UseRegister(node->InputAt(1))); 72 g.UseRegister(node->InputAt(1)));
65 } 73 }
66 74
67 75
68 static void VisitRRO(InstructionSelector* selector, ArchOpcode opcode, 76 static void VisitRRO(InstructionSelector* selector, ArchOpcode opcode,
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402 g.UseFixed(node->InputAt(1), f14))->MarkAsCall(); 410 g.UseFixed(node->InputAt(1), f14))->MarkAsCall();
403 } 411 }
404 412
405 413
406 void InstructionSelector::VisitFloat64Sqrt(Node* node) { 414 void InstructionSelector::VisitFloat64Sqrt(Node* node) {
407 MipsOperandGenerator g(this); 415 MipsOperandGenerator g(this);
408 Emit(kMipsSqrtD, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0))); 416 Emit(kMipsSqrtD, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
409 } 417 }
410 418
411 419
412 void InstructionSelector::VisitFloat64Floor(Node* node) { UNREACHABLE(); } 420 void InstructionSelector::VisitFloat64Floor(Node* node) {
421 VisitRR(this, kMipsFloorD, node);
422 }
413 423
414 424
415 void InstructionSelector::VisitFloat64Ceil(Node* node) { UNREACHABLE(); } 425 void InstructionSelector::VisitFloat64Ceil(Node* node) {
426 VisitRR(this, kMipsCeilD, node);
427 }
416 428
417 429
418 void InstructionSelector::VisitFloat64RoundTruncate(Node* node) { 430 void InstructionSelector::VisitFloat64RoundTruncate(Node* node) {
419 UNREACHABLE(); 431 VisitRR(this, kMipsRoundTruncateD, node);
420 } 432 }
421 433
422 434
423 void InstructionSelector::VisitFloat64RoundTiesAway(Node* node) { 435 void InstructionSelector::VisitFloat64RoundTiesAway(Node* node) {
424 UNREACHABLE(); 436 UNREACHABLE();
425 } 437 }
426 438
427 439
428 void InstructionSelector::VisitCall(Node* node) { 440 void InstructionSelector::VisitCall(Node* node) {
429 MipsOperandGenerator g(this); 441 MipsOperandGenerator g(this);
(...skipping 230 matching lines...) Expand 10 before | Expand all | Expand 10 after
660 672
661 void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) { 673 void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) {
662 FlagsContinuation cont(kUnorderedLessThanOrEqual, node); 674 FlagsContinuation cont(kUnorderedLessThanOrEqual, node);
663 VisitFloat64Compare(this, node, &cont); 675 VisitFloat64Compare(this, node, &cont);
664 } 676 }
665 677
666 678
667 // static 679 // static
668 MachineOperatorBuilder::Flags 680 MachineOperatorBuilder::Flags
669 InstructionSelector::SupportedMachineOperatorFlags() { 681 InstructionSelector::SupportedMachineOperatorFlags() {
670 return MachineOperatorBuilder::kInt32DivIsSafe | 682 MachineOperatorBuilder::Flags flags =
671 MachineOperatorBuilder::kInt32ModIsSafe | 683 MachineOperatorBuilder::kInt32DivIsSafe |
672 MachineOperatorBuilder::kUint32DivIsSafe | 684 MachineOperatorBuilder::kInt32ModIsSafe |
673 MachineOperatorBuilder::kUint32ModIsSafe; 685 MachineOperatorBuilder::kUint32DivIsSafe |
686 MachineOperatorBuilder::kUint32ModIsSafe;
687
688 if (CpuFeatures::IsSupported(MIPSr2) || CpuFeatures::IsSupported(MIPSr6)) {
689 flags |= MachineOperatorBuilder::kFloat64Floor |
690 MachineOperatorBuilder::kFloat64Ceil |
691 MachineOperatorBuilder::kFloat64RoundTruncate;
692 }
693 return flags;
674 } 694 }
675 695
676 } // namespace compiler 696 } // namespace compiler
677 } // namespace internal 697 } // namespace internal
678 } // namespace v8 698 } // namespace v8
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