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Side by Side Diff: src/compiler/mips/instruction-codes-mips.h

Issue 680833005: MIPS: Add floor, ceil, round (truncate) instructions for ia32, x64 (if SSE4.1) and add floor, ceil,… (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: supported on r6 also. Created 6 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 21 matching lines...) Expand all
32 V(MipsMov) \ 32 V(MipsMov) \
33 V(MipsTst) \ 33 V(MipsTst) \
34 V(MipsCmp) \ 34 V(MipsCmp) \
35 V(MipsCmpD) \ 35 V(MipsCmpD) \
36 V(MipsAddD) \ 36 V(MipsAddD) \
37 V(MipsSubD) \ 37 V(MipsSubD) \
38 V(MipsMulD) \ 38 V(MipsMulD) \
39 V(MipsDivD) \ 39 V(MipsDivD) \
40 V(MipsModD) \ 40 V(MipsModD) \
41 V(MipsSqrtD) \ 41 V(MipsSqrtD) \
42 V(MipsFloorD) \
43 V(MipsCeilD) \
44 V(MipsRoundTruncateD) \
42 V(MipsCvtSD) \ 45 V(MipsCvtSD) \
43 V(MipsCvtDS) \ 46 V(MipsCvtDS) \
44 V(MipsTruncWD) \ 47 V(MipsTruncWD) \
45 V(MipsTruncUwD) \ 48 V(MipsTruncUwD) \
46 V(MipsCvtDW) \ 49 V(MipsCvtDW) \
47 V(MipsCvtDUw) \ 50 V(MipsCvtDUw) \
48 V(MipsLb) \ 51 V(MipsLb) \
49 V(MipsLbu) \ 52 V(MipsLbu) \
50 V(MipsSb) \ 53 V(MipsSb) \
51 V(MipsLh) \ 54 V(MipsLh) \
(...skipping 26 matching lines...) Expand all
78 #define TARGET_ADDRESSING_MODE_LIST(V) \ 81 #define TARGET_ADDRESSING_MODE_LIST(V) \
79 V(MRI) /* [%r0 + K] */ \ 82 V(MRI) /* [%r0 + K] */ \
80 V(MRR) /* [%r0 + %r1] */ 83 V(MRR) /* [%r0 + %r1] */
81 84
82 85
83 } // namespace compiler 86 } // namespace compiler
84 } // namespace internal 87 } // namespace internal
85 } // namespace v8 88 } // namespace v8
86 89
87 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ 90 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_
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