| Index: src/IceRegAlloc.cpp
|
| diff --git a/src/IceRegAlloc.cpp b/src/IceRegAlloc.cpp
|
| index 1b4d0c249d0d872f2aecb705081dce83e25a04c8..d3fae45e909c6b2544bd56dc2642b055d633be32 100644
|
| --- a/src/IceRegAlloc.cpp
|
| +++ b/src/IceRegAlloc.cpp
|
| @@ -105,12 +105,15 @@ void LinearScan::scan(const llvm::SmallBitVector &RegMaskFull) {
|
| for (Variable *Var : Vars) {
|
| // Explicitly don't consider zero-weight variables, which are
|
| // meant to be spill slots.
|
| - if (Var->getWeight() == RegWeight::Zero)
|
| + if (Var->getWeight() == RegWeight::Zero) {
|
| + Var->setNeedsStackSlot();
|
| continue;
|
| + }
|
| // Don't bother if the variable has a null live range, which means
|
| // it was never referenced.
|
| if (Var->getLiveRange().isEmpty())
|
| continue;
|
| + Var->setNeedsStackSlot();
|
| Var->untrimLiveRange();
|
| Unhandled.push_back(Var);
|
| if (Var->hasReg()) {
|
|
|