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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/flow_graph_allocator.h" | 5 #include "vm/flow_graph_allocator.h" |
6 | 6 |
7 #include "vm/bit_vector.h" | 7 #include "vm/bit_vector.h" |
8 #include "vm/intermediate_language.h" | 8 #include "vm/intermediate_language.h" |
9 #include "vm/il_printer.h" | 9 #include "vm/il_printer.h" |
10 #include "vm/flow_graph.h" | 10 #include "vm/flow_graph.h" |
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99 } | 99 } |
100 | 100 |
101 // All registers are marked as "not blocked" (array initialized to false). | 101 // All registers are marked as "not blocked" (array initialized to false). |
102 // Mark the unavailable ones as "blocked" (true). | 102 // Mark the unavailable ones as "blocked" (true). |
103 for (intptr_t i = 0; i < kFirstFreeCpuRegister; i++) { | 103 for (intptr_t i = 0; i < kFirstFreeCpuRegister; i++) { |
104 blocked_cpu_registers_[i] = true; | 104 blocked_cpu_registers_[i] = true; |
105 } | 105 } |
106 for (intptr_t i = kLastFreeCpuRegister + 1; i < kNumberOfCpuRegisters; i++) { | 106 for (intptr_t i = kLastFreeCpuRegister + 1; i < kNumberOfCpuRegisters; i++) { |
107 blocked_cpu_registers_[i] = true; | 107 blocked_cpu_registers_[i] = true; |
108 } | 108 } |
109 blocked_cpu_registers_[CTX] = true; | |
110 if (TMP != kNoRegister) { | 109 if (TMP != kNoRegister) { |
111 blocked_cpu_registers_[TMP] = true; | 110 blocked_cpu_registers_[TMP] = true; |
112 } | 111 } |
113 if (TMP2 != kNoRegister) { | 112 if (TMP2 != kNoRegister) { |
114 blocked_cpu_registers_[TMP2] = true; | 113 blocked_cpu_registers_[TMP2] = true; |
115 } | 114 } |
116 if (PP != kNoRegister) { | 115 if (PP != kNoRegister) { |
117 blocked_cpu_registers_[PP] = true; | 116 blocked_cpu_registers_[PP] = true; |
118 } | 117 } |
119 blocked_cpu_registers_[SPREG] = true; | 118 blocked_cpu_registers_[SPREG] = true; |
120 blocked_cpu_registers_[FPREG] = true; | 119 blocked_cpu_registers_[FPREG] = true; |
121 | 120 |
122 // FpuTMP is used as scratch by optimized code and parallel move resolver. | 121 // FpuTMP is used as scratch by optimized code and parallel move resolver. |
123 blocked_fpu_registers_[FpuTMP] = true; | 122 blocked_fpu_registers_[FpuTMP] = true; |
124 | 123 |
125 // Block additional registers needed preserved when generating intrinsics. | 124 // Block additional registers needed preserved when generating intrinsics. |
126 // TODO(fschneider): Handle saving and restoring these registers when | 125 // TODO(fschneider): Handle saving and restoring these registers when |
127 // generating intrinsic code. | 126 // generating intrinsic code. |
128 if (intrinsic_mode) { | 127 if (intrinsic_mode) { |
129 blocked_cpu_registers_[ARGS_DESC_REG] = true; | 128 blocked_cpu_registers_[ARGS_DESC_REG] = true; |
| 129 blocked_cpu_registers_[CTX] = true; |
130 } | 130 } |
131 } | 131 } |
132 | 132 |
133 | 133 |
134 static void DeepLiveness(MaterializeObjectInstr* mat, BitVector* live_in) { | 134 static void DeepLiveness(MaterializeObjectInstr* mat, BitVector* live_in) { |
135 if (mat->was_visited_for_liveness()) { | 135 if (mat->was_visited_for_liveness()) { |
136 return; | 136 return; |
137 } | 137 } |
138 mat->mark_visited_for_liveness(); | 138 mat->mark_visited_for_liveness(); |
139 | 139 |
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654 if (param->base_reg() == FPREG) { | 654 if (param->base_reg() == FPREG) { |
655 // Slot index for the leftmost copied parameter is 0. | 655 // Slot index for the leftmost copied parameter is 0. |
656 // Slot index for the rightmost fixed parameter is -1. | 656 // Slot index for the rightmost fixed parameter is -1. |
657 slot_index -= flow_graph_.num_non_copied_params(); | 657 slot_index -= flow_graph_.num_non_copied_params(); |
658 } | 658 } |
659 | 659 |
660 range->set_assigned_location(Location::StackSlot(slot_index, | 660 range->set_assigned_location(Location::StackSlot(slot_index, |
661 param->base_reg())); | 661 param->base_reg())); |
662 range->set_spill_slot(Location::StackSlot(slot_index, | 662 range->set_spill_slot(Location::StackSlot(slot_index, |
663 param->base_reg())); | 663 param->base_reg())); |
| 664 } else if (defn->IsCurrentContext()) { |
| 665 AssignSafepoints(defn, range); |
| 666 range->finger()->Initialize(range); |
| 667 range->set_assigned_location(Location::RegisterLocation(CTX)); |
| 668 if (range->End() > kNormalEntryPos) { |
| 669 LiveRange* tail = range->SplitAt(kNormalEntryPos); |
| 670 CompleteRange(tail, Location::kRegister); |
| 671 } |
| 672 ConvertAllUses(range); |
| 673 return; |
664 } else { | 674 } else { |
665 ConstantInstr* constant = defn->AsConstant(); | 675 ConstantInstr* constant = defn->AsConstant(); |
666 ASSERT(constant != NULL); | 676 ASSERT(constant != NULL); |
667 range->set_assigned_location(Location::Constant(constant)); | 677 range->set_assigned_location(Location::Constant(constant)); |
668 range->set_spill_slot(Location::Constant(constant)); | 678 range->set_spill_slot(Location::Constant(constant)); |
669 } | 679 } |
670 AssignSafepoints(defn, range); | 680 AssignSafepoints(defn, range); |
671 range->finger()->Initialize(range); | 681 range->finger()->Initialize(range); |
672 UsePosition* use = | 682 UsePosition* use = |
673 range->finger()->FirstRegisterBeneficialUse(block->start_pos()); | 683 range->finger()->FirstRegisterBeneficialUse(block->start_pos()); |
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2427 | 2437 |
2428 return true; | 2438 return true; |
2429 } | 2439 } |
2430 | 2440 |
2431 | 2441 |
2432 MoveOperands* FlowGraphAllocator::AddMoveAt(intptr_t pos, | 2442 MoveOperands* FlowGraphAllocator::AddMoveAt(intptr_t pos, |
2433 Location to, | 2443 Location to, |
2434 Location from) { | 2444 Location from) { |
2435 ASSERT(!IsBlockEntry(pos)); | 2445 ASSERT(!IsBlockEntry(pos)); |
2436 | 2446 |
| 2447 if (pos < kNormalEntryPos) { |
| 2448 ASSERT(pos > 0); |
| 2449 // Parallel moves added to the GraphEntry (B0) will be added at the start |
| 2450 // of the normal entry (B1) |
| 2451 BlockEntryInstr* entry = InstructionAt(kNormalEntryPos)->AsBlockEntry(); |
| 2452 return entry->GetParallelMove()->AddMove(to, from); |
| 2453 } |
| 2454 |
2437 Instruction* instr = InstructionAt(pos); | 2455 Instruction* instr = InstructionAt(pos); |
2438 | 2456 |
2439 ParallelMoveInstr* parallel_move = NULL; | 2457 ParallelMoveInstr* parallel_move = NULL; |
2440 if (IsInstructionStartPosition(pos)) { | 2458 if (IsInstructionStartPosition(pos)) { |
2441 parallel_move = CreateParallelMoveBefore(instr, pos); | 2459 parallel_move = CreateParallelMoveBefore(instr, pos); |
2442 } else { | 2460 } else { |
2443 parallel_move = CreateParallelMoveAfter(instr, pos); | 2461 parallel_move = CreateParallelMoveAfter(instr, pos); |
2444 } | 2462 } |
2445 | 2463 |
2446 return parallel_move->AddMove(to, from); | 2464 return parallel_move->AddMove(to, from); |
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2955 OS::Print("-- [after ssa allocator] ir [%s] -------------\n", | 2973 OS::Print("-- [after ssa allocator] ir [%s] -------------\n", |
2956 function.ToFullyQualifiedCString()); | 2974 function.ToFullyQualifiedCString()); |
2957 FlowGraphPrinter printer(flow_graph_, true); | 2975 FlowGraphPrinter printer(flow_graph_, true); |
2958 printer.PrintBlocks(); | 2976 printer.PrintBlocks(); |
2959 OS::Print("----------------------------------------------\n"); | 2977 OS::Print("----------------------------------------------\n"); |
2960 } | 2978 } |
2961 } | 2979 } |
2962 | 2980 |
2963 | 2981 |
2964 } // namespace dart | 2982 } // namespace dart |
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