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Side by Side Diff: runtime/vm/flow_graph_allocator.cc

Issue 678763004: Make CTX allocatable by the register allocator. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: incorporated latest comments Created 6 years, 1 month ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/flow_graph_allocator.h" 5 #include "vm/flow_graph_allocator.h"
6 6
7 #include "vm/bit_vector.h" 7 #include "vm/bit_vector.h"
8 #include "vm/intermediate_language.h" 8 #include "vm/intermediate_language.h"
9 #include "vm/il_printer.h" 9 #include "vm/il_printer.h"
10 #include "vm/flow_graph.h" 10 #include "vm/flow_graph.h"
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99 } 99 }
100 100
101 // All registers are marked as "not blocked" (array initialized to false). 101 // All registers are marked as "not blocked" (array initialized to false).
102 // Mark the unavailable ones as "blocked" (true). 102 // Mark the unavailable ones as "blocked" (true).
103 for (intptr_t i = 0; i < kFirstFreeCpuRegister; i++) { 103 for (intptr_t i = 0; i < kFirstFreeCpuRegister; i++) {
104 blocked_cpu_registers_[i] = true; 104 blocked_cpu_registers_[i] = true;
105 } 105 }
106 for (intptr_t i = kLastFreeCpuRegister + 1; i < kNumberOfCpuRegisters; i++) { 106 for (intptr_t i = kLastFreeCpuRegister + 1; i < kNumberOfCpuRegisters; i++) {
107 blocked_cpu_registers_[i] = true; 107 blocked_cpu_registers_[i] = true;
108 } 108 }
109 blocked_cpu_registers_[CTX] = true;
110 if (TMP != kNoRegister) { 109 if (TMP != kNoRegister) {
111 blocked_cpu_registers_[TMP] = true; 110 blocked_cpu_registers_[TMP] = true;
112 } 111 }
113 if (TMP2 != kNoRegister) { 112 if (TMP2 != kNoRegister) {
114 blocked_cpu_registers_[TMP2] = true; 113 blocked_cpu_registers_[TMP2] = true;
115 } 114 }
116 if (PP != kNoRegister) { 115 if (PP != kNoRegister) {
117 blocked_cpu_registers_[PP] = true; 116 blocked_cpu_registers_[PP] = true;
118 } 117 }
119 blocked_cpu_registers_[SPREG] = true; 118 blocked_cpu_registers_[SPREG] = true;
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654 if (param->base_reg() == FPREG) { 653 if (param->base_reg() == FPREG) {
655 // Slot index for the leftmost copied parameter is 0. 654 // Slot index for the leftmost copied parameter is 0.
656 // Slot index for the rightmost fixed parameter is -1. 655 // Slot index for the rightmost fixed parameter is -1.
657 slot_index -= flow_graph_.num_non_copied_params(); 656 slot_index -= flow_graph_.num_non_copied_params();
658 } 657 }
659 658
660 range->set_assigned_location(Location::StackSlot(slot_index, 659 range->set_assigned_location(Location::StackSlot(slot_index,
661 param->base_reg())); 660 param->base_reg()));
662 range->set_spill_slot(Location::StackSlot(slot_index, 661 range->set_spill_slot(Location::StackSlot(slot_index,
663 param->base_reg())); 662 param->base_reg()));
663 } else if (defn->IsCurrentContext()) {
664 AssignSafepoints(defn, range);
665 range->finger()->Initialize(range);
666 range->set_assigned_location(Location::RegisterLocation(CTX));
667 if (range->End() > kNormalEntryPos) {
668 LiveRange* tail = range->SplitAt(kNormalEntryPos);
669 CompleteRange(tail, Location::kRegister);
670 }
671 ConvertAllUses(range);
672 return;
664 } else { 673 } else {
665 ConstantInstr* constant = defn->AsConstant(); 674 ConstantInstr* constant = defn->AsConstant();
666 ASSERT(constant != NULL); 675 ASSERT(constant != NULL);
667 range->set_assigned_location(Location::Constant(constant)); 676 range->set_assigned_location(Location::Constant(constant));
668 range->set_spill_slot(Location::Constant(constant)); 677 range->set_spill_slot(Location::Constant(constant));
669 } 678 }
670 AssignSafepoints(defn, range); 679 AssignSafepoints(defn, range);
671 range->finger()->Initialize(range); 680 range->finger()->Initialize(range);
672 UsePosition* use = 681 UsePosition* use =
673 range->finger()->FirstRegisterBeneficialUse(block->start_pos()); 682 range->finger()->FirstRegisterBeneficialUse(block->start_pos());
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2427 2436
2428 return true; 2437 return true;
2429 } 2438 }
2430 2439
2431 2440
2432 MoveOperands* FlowGraphAllocator::AddMoveAt(intptr_t pos, 2441 MoveOperands* FlowGraphAllocator::AddMoveAt(intptr_t pos,
2433 Location to, 2442 Location to,
2434 Location from) { 2443 Location from) {
2435 ASSERT(!IsBlockEntry(pos)); 2444 ASSERT(!IsBlockEntry(pos));
2436 2445
2446 if (pos < kNormalEntryPos) {
2447 ASSERT(pos > 0);
2448 // Parallel moves added to the GraphEntry (B0) will be added at the start
2449 // of the normal entry (B1)
2450 BlockEntryInstr* entry = InstructionAt(kNormalEntryPos)->AsBlockEntry();
2451 return entry->GetParallelMove()->AddMove(to, from);
2452 }
2453
2437 Instruction* instr = InstructionAt(pos); 2454 Instruction* instr = InstructionAt(pos);
2438 2455
2439 ParallelMoveInstr* parallel_move = NULL; 2456 ParallelMoveInstr* parallel_move = NULL;
2440 if (IsInstructionStartPosition(pos)) { 2457 if (IsInstructionStartPosition(pos)) {
2441 parallel_move = CreateParallelMoveBefore(instr, pos); 2458 parallel_move = CreateParallelMoveBefore(instr, pos);
2442 } else { 2459 } else {
2443 parallel_move = CreateParallelMoveAfter(instr, pos); 2460 parallel_move = CreateParallelMoveAfter(instr, pos);
2444 } 2461 }
2445 2462
2446 return parallel_move->AddMove(to, from); 2463 return parallel_move->AddMove(to, from);
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2955 OS::Print("-- [after ssa allocator] ir [%s] -------------\n", 2972 OS::Print("-- [after ssa allocator] ir [%s] -------------\n",
2956 function.ToFullyQualifiedCString()); 2973 function.ToFullyQualifiedCString());
2957 FlowGraphPrinter printer(flow_graph_, true); 2974 FlowGraphPrinter printer(flow_graph_, true);
2958 printer.PrintBlocks(); 2975 printer.PrintBlocks();
2959 OS::Print("----------------------------------------------\n"); 2976 OS::Print("----------------------------------------------\n");
2960 } 2977 }
2961 } 2978 }
2962 2979
2963 2980
2964 } // namespace dart 2981 } // namespace dart
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