Index: src/compiler/ia32/instruction-selector-ia32.cc |
diff --git a/src/compiler/ia32/instruction-selector-ia32.cc b/src/compiler/ia32/instruction-selector-ia32.cc |
index ca4bf1ba16f33ffd6bc7bd99fb3c32252b6b949a..ec818f2d415b9f27e696068f0e1d4bcb157e0105 100644 |
--- a/src/compiler/ia32/instruction-selector-ia32.cc |
+++ b/src/compiler/ia32/instruction-selector-ia32.cc |
@@ -596,6 +596,32 @@ void InstructionSelector::VisitFloat64Sqrt(Node* node) { |
} |
+void InstructionSelector::VisitFloat64Floor(Node* node) { |
dcarney
2014/10/27 08:15:08
should dcheck that sse4.1 is supported here instea
sigurds
2014/10/28 12:47:22
Done.
|
+ IA32OperandGenerator g(this); |
+ Emit(kSSEFloat64Floor, g.DefineAsRegister(node), |
+ g.UseRegister(node->InputAt(0))); |
+} |
+ |
+ |
+void InstructionSelector::VisitFloat64Ceil(Node* node) { |
+ IA32OperandGenerator g(this); |
+ Emit(kSSEFloat64Ceil, g.DefineAsRegister(node), |
+ g.UseRegister(node->InputAt(0))); |
+} |
+ |
+ |
+void InstructionSelector::VisitFloat64RoundTruncate(Node* node) { |
+ IA32OperandGenerator g(this); |
+ Emit(kSSEFloat64RoundTruncate, g.DefineAsRegister(node), |
+ g.UseRegister(node->InputAt(0))); |
+} |
+ |
+ |
+void InstructionSelector::VisitFloat64RoundTiesAway(Node* node) { |
+ UnsupportedOperator(node); |
+} |
+ |
+ |
void InstructionSelector::VisitCall(Node* node) { |
IA32OperandGenerator g(this); |
CallDescriptor* descriptor = OpParameter<CallDescriptor*>(node); |
@@ -881,6 +907,11 @@ void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) { |
// static |
MachineOperatorBuilder::Flags |
InstructionSelector::SupportedMachineOperatorFlags() { |
+ if (CpuFeatures::IsSupported(SSE4_1)) { |
+ return MachineOperatorBuilder::Flag::kFloat64Floor | |
+ MachineOperatorBuilder::Flag::kFloat64Ceil | |
+ MachineOperatorBuilder::Flag::kFloat64RoundTruncate; |
+ } |
return MachineOperatorBuilder::Flag::kNoFlags; |
} |
} // namespace compiler |