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Side by Side Diff: src/compiler/arm/instruction-selector-arm.cc

Issue 677433002: Add floor, ceil, round (truncate) instructions for ia32, x64 (if SSE4.1) and (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Whitespace. Created 6 years, 1 month ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/bits.h" 5 #include "src/base/bits.h"
6 #include "src/compiler/instruction-selector-impl.h" 6 #include "src/compiler/instruction-selector-impl.h"
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
(...skipping 82 matching lines...) Expand 10 before | Expand all | Expand 10 after
93 case kArmVcmpF64: 93 case kArmVcmpF64:
94 case kArmVaddF64: 94 case kArmVaddF64:
95 case kArmVsubF64: 95 case kArmVsubF64:
96 case kArmVmulF64: 96 case kArmVmulF64:
97 case kArmVmlaF64: 97 case kArmVmlaF64:
98 case kArmVmlsF64: 98 case kArmVmlsF64:
99 case kArmVdivF64: 99 case kArmVdivF64:
100 case kArmVmodF64: 100 case kArmVmodF64:
101 case kArmVnegF64: 101 case kArmVnegF64:
102 case kArmVsqrtF64: 102 case kArmVsqrtF64:
103 case kArmVfloorF64:
104 case kArmVceilF64:
105 case kArmVroundTruncateF64:
106 case kArmVroundTiesAwayF64:
103 case kArmVcvtF32F64: 107 case kArmVcvtF32F64:
104 case kArmVcvtF64F32: 108 case kArmVcvtF64F32:
105 case kArmVcvtF64S32: 109 case kArmVcvtF64S32:
106 case kArmVcvtF64U32: 110 case kArmVcvtF64U32:
107 case kArmVcvtS32F64: 111 case kArmVcvtS32F64:
108 case kArmVcvtU32F64: 112 case kArmVcvtU32F64:
109 case kArmPush: 113 case kArmPush:
110 return false; 114 return false;
111 } 115 }
112 UNREACHABLE(); 116 UNREACHABLE();
113 return false; 117 return false;
114 } 118 }
115 }; 119 };
116 120
117 121
122 static void VisitRRFloat64(InstructionSelector* selector, ArchOpcode opcode,
123 Node* node) {
124 ArmOperandGenerator g(selector);
125 selector->Emit(opcode, g.DefineAsRegister(node),
126 g.UseRegister(node->InputAt(0)));
127 }
128
129
118 static void VisitRRRFloat64(InstructionSelector* selector, ArchOpcode opcode, 130 static void VisitRRRFloat64(InstructionSelector* selector, ArchOpcode opcode,
119 Node* node) { 131 Node* node) {
120 ArmOperandGenerator g(selector); 132 ArmOperandGenerator g(selector);
121 selector->Emit(opcode, g.DefineAsRegister(node), 133 selector->Emit(opcode, g.DefineAsRegister(node),
122 g.UseRegister(node->InputAt(0)), 134 g.UseRegister(node->InputAt(0)),
123 g.UseRegister(node->InputAt(1))); 135 g.UseRegister(node->InputAt(1)));
124 } 136 }
125 137
126 138
127 static bool TryMatchROR(InstructionSelector* selector, 139 static bool TryMatchROR(InstructionSelector* selector,
(...skipping 691 matching lines...) Expand 10 before | Expand all | Expand 10 after
819 g.UseFixed(node->InputAt(1), d1))->MarkAsCall(); 831 g.UseFixed(node->InputAt(1), d1))->MarkAsCall();
820 } 832 }
821 833
822 834
823 void InstructionSelector::VisitFloat64Sqrt(Node* node) { 835 void InstructionSelector::VisitFloat64Sqrt(Node* node) {
824 ArmOperandGenerator g(this); 836 ArmOperandGenerator g(this);
825 Emit(kArmVsqrtF64, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0))); 837 Emit(kArmVsqrtF64, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
826 } 838 }
827 839
828 840
841 void InstructionSelector::VisitFloat64Floor(Node* node) {
842 if (!CpuFeatures::IsSupported(ARMv8)) {
Benedikt Meurer 2014/10/30 11:59:12 I think this should be DCHECK(CpuFeatures::IsSuppo
sigurds 2014/10/30 12:18:26 Done.
843 UNSUPPORTED_OPERATOR(node);
844 }
845 VisitRRFloat64(this, kArmVfloorF64, node);
846 }
847
848
849 void InstructionSelector::VisitFloat64Ceil(Node* node) {
850 if (!CpuFeatures::IsSupported(ARMv8)) {
Benedikt Meurer 2014/10/30 11:59:12 I think this should be DCHECK(CpuFeatures::IsSuppo
sigurds 2014/10/30 12:18:26 Done.
851 UNSUPPORTED_OPERATOR(node);
852 }
853 VisitRRFloat64(this, kArmVceilF64, node);
854 }
855
856
857 void InstructionSelector::VisitFloat64RoundTruncate(Node* node) {
858 if (!CpuFeatures::IsSupported(ARMv8)) {
Benedikt Meurer 2014/10/30 11:59:12 I think this should be DCHECK(CpuFeatures::IsSuppo
sigurds 2014/10/30 12:18:26 Done.
859 UNSUPPORTED_OPERATOR(node);
860 }
861 VisitRRFloat64(this, kArmVroundTruncateF64, node);
862 }
863
864
865 void InstructionSelector::VisitFloat64RoundTiesAway(Node* node) {
866 if (!CpuFeatures::IsSupported(ARMv8)) {
Benedikt Meurer 2014/10/30 11:59:12 I think this should be DCHECK(CpuFeatures::IsSuppo
sigurds 2014/10/30 12:18:26 Done.
867 UNSUPPORTED_OPERATOR(node);
868 }
869 VisitRRFloat64(this, kArmVroundTiesAwayF64, node);
870 }
871
872
829 void InstructionSelector::VisitCall(Node* node) { 873 void InstructionSelector::VisitCall(Node* node) {
830 ArmOperandGenerator g(this); 874 ArmOperandGenerator g(this);
831 CallDescriptor* descriptor = OpParameter<CallDescriptor*>(node); 875 CallDescriptor* descriptor = OpParameter<CallDescriptor*>(node);
832 876
833 FrameStateDescriptor* frame_state_descriptor = NULL; 877 FrameStateDescriptor* frame_state_descriptor = NULL;
834 if (descriptor->NeedsFrameState()) { 878 if (descriptor->NeedsFrameState()) {
835 frame_state_descriptor = 879 frame_state_descriptor =
836 GetFrameStateDescriptor(node->InputAt(descriptor->InputCount())); 880 GetFrameStateDescriptor(node->InputAt(descriptor->InputCount()));
837 } 881 }
838 882
(...skipping 293 matching lines...) Expand 10 before | Expand all | Expand 10 after
1132 1176
1133 void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) { 1177 void InstructionSelector::VisitFloat64LessThanOrEqual(Node* node) {
1134 FlagsContinuation cont(kUnorderedLessThanOrEqual, node); 1178 FlagsContinuation cont(kUnorderedLessThanOrEqual, node);
1135 VisitFloat64Compare(this, node, &cont); 1179 VisitFloat64Compare(this, node, &cont);
1136 } 1180 }
1137 1181
1138 1182
1139 // static 1183 // static
1140 MachineOperatorBuilder::Flags 1184 MachineOperatorBuilder::Flags
1141 InstructionSelector::SupportedMachineOperatorFlags() { 1185 InstructionSelector::SupportedMachineOperatorFlags() {
1142 return MachineOperatorBuilder::kInt32DivIsSafe | 1186 MachineOperatorBuilder::Flags flags =
1143 MachineOperatorBuilder::kInt32ModIsSafe | 1187 MachineOperatorBuilder::kInt32DivIsSafe |
1144 MachineOperatorBuilder::kUint32DivIsSafe | 1188 MachineOperatorBuilder::kInt32ModIsSafe |
1145 MachineOperatorBuilder::kUint32ModIsSafe; 1189 MachineOperatorBuilder::kUint32DivIsSafe |
1190 MachineOperatorBuilder::kUint32ModIsSafe;
1191
1192 if (CpuFeatures::IsSupported(ARMv8)) {
1193 flags |= MachineOperatorBuilder::kFloat64Floor |
1194 MachineOperatorBuilder::kFloat64Ceil |
1195 MachineOperatorBuilder::kFloat64RoundTruncate |
1196 MachineOperatorBuilder::kFloat64RoundTiesAway;
1197 }
1198 return flags;
1146 } 1199 }
1147 1200
1148 } // namespace compiler 1201 } // namespace compiler
1149 } // namespace internal 1202 } // namespace internal
1150 } // namespace v8 1203 } // namespace v8
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