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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include <setjmp.h> | 5 #include <setjmp.h> |
6 #include <stdlib.h> | 6 #include <stdlib.h> |
7 | 7 |
8 #include "vm/globals.h" | 8 #include "vm/globals.h" |
9 #if defined(TARGET_ARCH_ARM) | 9 #if defined(TARGET_ARCH_ARM) |
10 | 10 |
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671 offset += len; | 671 offset += len; |
672 } | 672 } |
673 ASSERT(result != NULL); | 673 ASSERT(result != NULL); |
674 result[offset] = '\0'; | 674 result[offset] = '\0'; |
675 return result; | 675 return result; |
676 } | 676 } |
677 | 677 |
678 | 678 |
679 // Synchronization primitives support. | 679 // Synchronization primitives support. |
680 Mutex* Simulator::exclusive_access_lock_ = NULL; | 680 Mutex* Simulator::exclusive_access_lock_ = NULL; |
681 Simulator::AddressTag Simulator::exclusive_access_state_[kNumAddressTags]; | 681 Simulator::AddressTag Simulator::exclusive_access_state_[kNumAddressTags] = |
682 int Simulator::next_address_tag_; | 682 {{NULL, 0}}; |
| 683 int Simulator::next_address_tag_ = 0; |
683 | 684 |
684 | 685 |
685 void Simulator::SetExclusiveAccess(uword addr) { | 686 void Simulator::InitOnce() { |
686 Isolate* isolate = Isolate::Current(); | 687 // Setup exclusive access state lock. |
687 ASSERT(isolate != NULL); | 688 exclusive_access_lock_ = new Mutex(); |
688 int i = 0; | |
689 while ((i < kNumAddressTags) && | |
690 (exclusive_access_state_[i].isolate != isolate)) { | |
691 i++; | |
692 } | |
693 if (i == kNumAddressTags) { | |
694 i = next_address_tag_; | |
695 if (++next_address_tag_ == kNumAddressTags) next_address_tag_ = 0; | |
696 exclusive_access_state_[i].isolate = isolate; | |
697 } | |
698 exclusive_access_state_[i].addr = addr; | |
699 } | 689 } |
700 | 690 |
701 | 691 |
702 bool Simulator::HasExclusiveAccessAndOpen(uword addr) { | |
703 Isolate* isolate = Isolate::Current(); | |
704 ASSERT(isolate != NULL); | |
705 bool result = false; | |
706 for (int i = 0; i < kNumAddressTags; i++) { | |
707 if (exclusive_access_state_[i].isolate == isolate) { | |
708 if (exclusive_access_state_[i].addr == addr) { | |
709 result = true; | |
710 } | |
711 exclusive_access_state_[i].addr = NULL; | |
712 continue; | |
713 } | |
714 if (exclusive_access_state_[i].addr == addr) { | |
715 exclusive_access_state_[i].addr = NULL; | |
716 } | |
717 } | |
718 return result; | |
719 } | |
720 | |
721 | |
722 void Simulator::InitOnce() { | |
723 // Setup exclusive access state. | |
724 exclusive_access_lock_ = new Mutex(); | |
725 for (int i = 0; i < kNumAddressTags; i++) { | |
726 exclusive_access_state_[i].isolate = NULL; | |
727 exclusive_access_state_[i].addr = NULL; | |
728 } | |
729 next_address_tag_ = 0; | |
730 } | |
731 | |
732 | |
733 Simulator::Simulator() { | 692 Simulator::Simulator() { |
734 // Setup simulator support first. Some of this information is needed to | 693 // Setup simulator support first. Some of this information is needed to |
735 // setup the architecture state. | 694 // setup the architecture state. |
736 // We allocate the stack here, the size is computed as the sum of | 695 // We allocate the stack here, the size is computed as the sum of |
737 // the size specified by the user and the buffer space needed for | 696 // the size specified by the user and the buffer space needed for |
738 // handling stack overflow exceptions. To be safe in potential | 697 // handling stack overflow exceptions. To be safe in potential |
739 // stack underflows we also add some underflow buffer space. | 698 // stack underflows we also add some underflow buffer space. |
740 stack_ = new char[(Isolate::GetSpecifiedStackSize() + | 699 stack_ = new char[(Isolate::GetSpecifiedStackSize() + |
741 Isolate::kStackSizeBuffer + | 700 Isolate::kStackSizeBuffer + |
742 kSimulatorStackUnderflowSize)]; | 701 kSimulatorStackUnderflowSize)]; |
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1105 | 1064 |
1106 void Simulator::WriteB(uword addr, uint8_t value) { | 1065 void Simulator::WriteB(uword addr, uint8_t value) { |
1107 static StatsCounter counter_write_b("Simulated byte writes"); | 1066 static StatsCounter counter_write_b("Simulated byte writes"); |
1108 counter_write_b.Increment(); | 1067 counter_write_b.Increment(); |
1109 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr); | 1068 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr); |
1110 *ptr = value; | 1069 *ptr = value; |
1111 } | 1070 } |
1112 | 1071 |
1113 | 1072 |
1114 // Synchronization primitives support. | 1073 // Synchronization primitives support. |
| 1074 void Simulator::SetExclusiveAccess(uword addr) { |
| 1075 Isolate* isolate = Isolate::Current(); |
| 1076 ASSERT(isolate != NULL); |
| 1077 DEBUG_ASSERT(exclusive_access_lock_->Owner() == isolate); |
| 1078 int i = 0; |
| 1079 // Find an entry for this isolate in the exclusive access state. |
| 1080 while ((i < kNumAddressTags) && |
| 1081 (exclusive_access_state_[i].isolate != isolate)) { |
| 1082 i++; |
| 1083 } |
| 1084 // Round-robin replacement of previously used entries. |
| 1085 if (i == kNumAddressTags) { |
| 1086 i = next_address_tag_; |
| 1087 if (++next_address_tag_ == kNumAddressTags) { |
| 1088 next_address_tag_ = 0; |
| 1089 } |
| 1090 exclusive_access_state_[i].isolate = isolate; |
| 1091 } |
| 1092 // Remember the address being reserved. |
| 1093 exclusive_access_state_[i].addr = addr; |
| 1094 } |
| 1095 |
| 1096 |
| 1097 bool Simulator::HasExclusiveAccessAndOpen(uword addr) { |
| 1098 Isolate* isolate = Isolate::Current(); |
| 1099 ASSERT(isolate != NULL); |
| 1100 ASSERT(addr != 0); |
| 1101 DEBUG_ASSERT(exclusive_access_lock_->Owner() == isolate); |
| 1102 bool result = false; |
| 1103 for (int i = 0; i < kNumAddressTags; i++) { |
| 1104 if (exclusive_access_state_[i].isolate == isolate) { |
| 1105 // Check whether the current isolate's address reservation matches. |
| 1106 if (exclusive_access_state_[i].addr == addr) { |
| 1107 result = true; |
| 1108 } |
| 1109 exclusive_access_state_[i].addr = 0; |
| 1110 } else if (exclusive_access_state_[i].addr == addr) { |
| 1111 // Other isolates with matching address lose their reservations. |
| 1112 exclusive_access_state_[i].addr = 0; |
| 1113 } |
| 1114 } |
| 1115 return result; |
| 1116 } |
| 1117 |
| 1118 |
1115 void Simulator::ClearExclusive() { | 1119 void Simulator::ClearExclusive() { |
1116 // This lock is initialized in Simulator::InitOnce(). | |
1117 MutexLocker ml(exclusive_access_lock_); | 1120 MutexLocker ml(exclusive_access_lock_); |
1118 // Set exclusive access to open state for this isolate. | 1121 // Remove the reservation for this isolate. |
1119 HasExclusiveAccessAndOpen(NULL); | 1122 SetExclusiveAccess(NULL); |
1120 } | 1123 } |
1121 | 1124 |
1122 | 1125 |
1123 intptr_t Simulator::ReadExclusiveW(uword addr, Instr* instr) { | 1126 intptr_t Simulator::ReadExclusiveW(uword addr, Instr* instr) { |
1124 // This lock is initialized in Simulator::InitOnce(). | |
1125 MutexLocker ml(exclusive_access_lock_); | 1127 MutexLocker ml(exclusive_access_lock_); |
1126 SetExclusiveAccess(addr); | 1128 SetExclusiveAccess(addr); |
1127 return ReadW(addr, instr); | 1129 return ReadW(addr, instr); |
1128 } | 1130 } |
1129 | 1131 |
1130 | 1132 |
1131 intptr_t Simulator::WriteExclusiveW(uword addr, intptr_t value, Instr* instr) { | 1133 intptr_t Simulator::WriteExclusiveW(uword addr, intptr_t value, Instr* instr) { |
1132 // This lock is initialized in Simulator::InitOnce(). | |
1133 MutexLocker ml(exclusive_access_lock_); | 1134 MutexLocker ml(exclusive_access_lock_); |
1134 bool write_allowed = HasExclusiveAccessAndOpen(addr); | 1135 bool write_allowed = HasExclusiveAccessAndOpen(addr); |
1135 if (write_allowed) { | 1136 if (write_allowed) { |
1136 WriteW(addr, value, instr); | 1137 WriteW(addr, value, instr); |
1137 return 0; // Success. | 1138 return 0; // Success. |
1138 } | 1139 } |
1139 return 1; // Failure. | 1140 return 1; // Failure. |
1140 } | 1141 } |
1141 | 1142 |
1142 | 1143 |
1143 uword Simulator::CompareExchange(uword* address, | 1144 uword Simulator::CompareExchange(uword* address, |
1144 uword compare_value, | 1145 uword compare_value, |
1145 uword new_value) { | 1146 uword new_value) { |
1146 // This lock is initialized in Simulator::InitOnce(). | |
1147 MutexLocker ml(exclusive_access_lock_); | 1147 MutexLocker ml(exclusive_access_lock_); |
| 1148 // We do not get a reservation as it would be guaranteed to be found when |
| 1149 // writing below. No other isolate is able to make a reservation while we |
| 1150 // hold the lock. |
1148 uword value = *address; | 1151 uword value = *address; |
1149 if (value == compare_value) { | 1152 if (value == compare_value) { |
1150 *address = new_value; | 1153 *address = new_value; |
1151 // Same effect on exclusive access state as a successful STREX. | 1154 // Same effect on exclusive access state as a successful STREX. |
1152 HasExclusiveAccessAndOpen(reinterpret_cast<uword>(address)); | 1155 HasExclusiveAccessAndOpen(reinterpret_cast<uword>(address)); |
1153 } else { | 1156 } else { |
1154 // Same effect on exclusive access state as an LDREX. | 1157 // Same effect on exclusive access state as an LDREX. |
1155 SetExclusiveAccess(reinterpret_cast<uword>(address)); | 1158 SetExclusiveAccess(reinterpret_cast<uword>(address)); |
1156 } | 1159 } |
1157 return value; | 1160 return value; |
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3867 set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception)); | 3870 set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception)); |
3868 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace)); | 3871 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace)); |
3869 buf->Longjmp(); | 3872 buf->Longjmp(); |
3870 } | 3873 } |
3871 | 3874 |
3872 } // namespace dart | 3875 } // namespace dart |
3873 | 3876 |
3874 #endif // !defined(HOST_ARCH_ARM) | 3877 #endif // !defined(HOST_ARCH_ARM) |
3875 | 3878 |
3876 #endif // defined TARGET_ARCH_ARM | 3879 #endif // defined TARGET_ARCH_ARM |
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