[turbofan] cleanup register allocator interface a little

src/compiler/register-allocator.h

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_REGISTER_ALLOCATOR_H_
 #define V8_REGISTER_ALLOCATOR_H_
 
 #include "src/allocation.h"
 #include "src/compiler/instruction.h"
-#include "src/compiler/zone-pool.h"
 #include "src/macro-assembler.h"
 #include "src/zone.h"
 
 namespace v8 {
 namespace internal {
 
 // Forward declarations.
 class BitVector;
 class InstructionOperand;
 class UnallocatedOperand;
 class ParallelMove;
 class PointerMap;
 
 namespace compiler {
 
 class PipelineStatistics;
 
 enum RegisterKind {
   UNALLOCATED_REGISTERS,
   GENERAL_REGISTERS,
   DOUBLE_REGISTERS
 };
 
 
 // This class represents a single point of a InstructionOperand's lifetime. For
 // each instruction there are exactly two lifetime positions: the beginning and
 // the end of the instruction. Lifetime positions for different instructions are
 // disjoint.
-class LifetimePosition {
+class LifetimePosition FINAL {
  public:
   // Return the lifetime position that corresponds to the beginning of
   // the instruction with the given index.
   static LifetimePosition FromInstructionIndex(int index) {
     return LifetimePosition(index * kStep);
   }
 
   // Returns a numeric representation of this lifetime position.
   int Value() const { return value_; }
 
@@ skipping 58 matching lines @@
   // Code relies on kStep being a power of two.
   STATIC_ASSERT(IS_POWER_OF_TWO(kStep));
 
   explicit LifetimePosition(int value) : value_(value) {}
 
   int value_;
 };
 
 
 // Representation of the non-empty interval [start,end[.
-class UseInterval : public ZoneObject {
+class UseInterval FINAL : public ZoneObject {
  public:
   UseInterval(LifetimePosition start, LifetimePosition end)
       : start_(start), end_(end), next_(NULL) {
     DCHECK(start.Value() < end.Value());
   }
 
   LifetimePosition start() const { return start_; }
   LifetimePosition end() const { return end_; }
   UseInterval* next() const { return next_; }
 
@@ skipping 12 matching lines @@
   bool Contains(LifetimePosition point) const {
     return start_.Value() <= point.Value() && point.Value() < end_.Value();
   }
 
   void set_start(LifetimePosition start) { start_ = start; }
   void set_next(UseInterval* next) { next_ = next; }
 
   LifetimePosition start_;
   LifetimePosition end_;
   UseInterval* next_;
+
+ private:
+  DISALLOW_COPY_AND_ASSIGN(UseInterval);
 };
 
+
 // Representation of a use position.
-class UsePosition : public ZoneObject {
+class UsePosition FINAL : public ZoneObject {
  public:
   UsePosition(LifetimePosition pos, InstructionOperand* operand,
               InstructionOperand* hint);
 
   InstructionOperand* operand() const { return operand_; }
   bool HasOperand() const { return operand_ != NULL; }
 
   InstructionOperand* hint() const { return hint_; }
   bool HasHint() const;
   bool RequiresRegister() const;
   bool RegisterIsBeneficial() const;
 
   LifetimePosition pos() const { return pos_; }
   UsePosition* next() const { return next_; }
 
   void set_next(UsePosition* next) { next_ = next; }
 
   InstructionOperand* const operand_;
   InstructionOperand* const hint_;
   LifetimePosition const pos_;
   UsePosition* next_;
-  bool requires_reg_;
-  bool register_beneficial_;
+  bool requires_reg_ : 1;

[Jarin, 2014/10/29 12:16:51]

I do not think the bit field makes any difference.

+  bool register_beneficial_ : 1;
+
+ private:
+  DISALLOW_COPY_AND_ASSIGN(UsePosition);
 };
 
+
 // Representation of SSA values' live ranges as a collection of (continuous)
 // intervals over the instruction ordering.
-class LiveRange : public ZoneObject {
+class LiveRange FINAL : public ZoneObject {
  public:
   static const int kInvalidAssignment = 0x7fffffff;
 
   LiveRange(int id, Zone* zone);
 
   UseInterval* first_interval() const { return first_interval_; }
   UsePosition* first_pos() const { return first_pos_; }
   LiveRange* parent() const { return parent_; }
   LiveRange* TopLevel() { return (parent_ == NULL) ? this : parent_; }
   LiveRange* next() const { return next_; }
@@ skipping 96 matching lines @@
   void Verify() const;
 #endif
 
  private:
   void ConvertOperands(Zone* zone);
   UseInterval* FirstSearchIntervalForPosition(LifetimePosition position) const;
   void AdvanceLastProcessedMarker(UseInterval* to_start_of,
                                   LifetimePosition but_not_past) const;
 
   int id_;
-  bool spilled_;
-  bool is_phi_;
-  bool is_non_loop_phi_;
-  RegisterKind kind_;
   int assigned_register_;
+  bool spilled_ : 1;
+  bool is_phi_ : 1;
+  bool is_non_loop_phi_ : 1;
+  RegisterKind kind_ : 2;

[Jarin, 2014/10/29 12:16:51]

Does the bitfield make any difference?

If yes, then consider 3 bits for RegisterKind - on Windows, there is apparently
some sign extension going on, so this might not work.

   UseInterval* last_interval_;
   UseInterval* first_interval_;
   UsePosition* first_pos_;
   LiveRange* parent_;
   LiveRange* next_;
   // This is used as a cache, it doesn't affect correctness.
   mutable UseInterval* current_interval_;
   UsePosition* last_processed_use_;
   // This is used as a cache, it's invalid outside of BuildLiveRanges.
   InstructionOperand* current_hint_operand_;
   InstructionOperand* spill_operand_;
   int spill_start_index_;
 
   friend class RegisterAllocator;  // Assigns to kind_.
+
+  DISALLOW_COPY_AND_ASSIGN(LiveRange);
 };
 
 
 class RegisterAllocator BASE_EMBEDDED {
  public:
-  // TODO(dcarney): remove info
   explicit RegisterAllocator(Zone* local_zone, Frame* frame,
-                             CompilationInfo* info, InstructionSequence* code);
-
-  static void TraceAlloc(const char* msg, ...);
-
-  // Checks whether the value of a given virtual register is a reference.
-  // TODO(titzer): rename this to IsReference.
-  bool HasTaggedValue(int virtual_register) const;
-
-  // Returns the register kind required by the given virtual register.
-  RegisterKind RequiredRegisterKind(int virtual_register) const;
+                             InstructionSequence* code,
+                             const char* debug_name = nullptr);
 
   bool Allocate(PipelineStatistics* stats = NULL);
+  bool AllocationOk() { return allocation_ok_; }
+  BitVector* assigned_registers() { return assigned_registers_; }
+  BitVector* assigned_double_registers() { return assigned_double_registers_; }
 
   const ZoneList<LiveRange*>* live_ranges() const { return &live_ranges_; }
   const Vector<LiveRange*>* fixed_live_ranges() const {
     return &fixed_live_ranges_;
   }
   const Vector<LiveRange*>* fixed_double_live_ranges() const {
     return &fixed_double_live_ranges_;
   }
+  InstructionSequence* code() const { return code_; }
 
-  CompilationInfo* info() const { return info_; }
-  inline InstructionSequence* code() const { return code_; }
-
-  // This zone is for datastructures only needed during register allocation.
-  inline Zone* zone() const { return zone_; }
-
-  // This zone is for InstructionOperands and moves that live beyond register
-  // allocation.
-  inline Zone* code_zone() const { return code()->zone(); }
-
+ private:
   int GetVirtualRegister() {
     int vreg = code()->NextVirtualRegister();
     if (vreg >= UnallocatedOperand::kMaxVirtualRegisters) {
       allocation_ok_ = false;
       // Maintain the invariant that we return something below the maximum.
       return 0;
     }
     return vreg;
   }
 
-  bool AllocationOk() { return allocation_ok_; }
+  // Checks whether the value of a given virtual register is a reference.
+  // TODO(titzer): rename this to IsReference.
+  bool HasTaggedValue(int virtual_register) const;
+
+  // Returns the register kind required by the given virtual register.
+  RegisterKind RequiredRegisterKind(int virtual_register) const;
+
+  // This zone is for datastructures only needed during register allocation.
+  Zone* zone() const { return zone_; }
+
+  // This zone is for InstructionOperands and moves that live beyond register
+  // allocation.
+  Zone* code_zone() const { return code()->zone(); }
 
 #ifdef DEBUG
   void Verify() const;
 #endif
 
-  BitVector* assigned_registers() { return assigned_registers_; }
-  BitVector* assigned_double_registers() { return assigned_double_registers_; }
-
- private:
   void MeetRegisterConstraints();
   void ResolvePhis();
   void BuildLiveRanges();
   void AllocateGeneralRegisters();
   void AllocateDoubleRegisters();
   void ConnectRanges();
   void ResolveControlFlow();
   void PopulatePointerMaps();  // TODO(titzer): rename to PopulateReferenceMaps.
   void AllocateRegisters();
   bool CanEagerlyResolveControlFlow(const InstructionBlock* block) const;
-  inline bool SafePointsAreInOrder() const;
+  bool SafePointsAreInOrder() const;
 
   // Liveness analysis support.
   void InitializeLivenessAnalysis();
   BitVector* ComputeLiveOut(const InstructionBlock* block);
   void AddInitialIntervals(const InstructionBlock* block, BitVector* live_out);
   bool IsOutputRegisterOf(Instruction* instr, int index);
   bool IsOutputDoubleRegisterOf(Instruction* instr, int index);
   void ProcessInstructions(const InstructionBlock* block, BitVector* live);
   void MeetRegisterConstraints(const InstructionBlock* block);
   void MeetConstraintsBetween(Instruction* first, Instruction* second,
@@ skipping 70 matching lines @@
   LifetimePosition FindOptimalSpillingPos(LiveRange* range,
                                           LifetimePosition pos);
 
   void Spill(LiveRange* range);
   bool IsBlockBoundary(LifetimePosition pos);
 
   // Helper methods for resolving control flow.
   void ResolveControlFlow(LiveRange* range, const InstructionBlock* block,
                           const InstructionBlock* pred);
 
-  inline void SetLiveRangeAssignedRegister(LiveRange* range, int reg);
+  void SetLiveRangeAssignedRegister(LiveRange* range, int reg);
 
   // Return parallel move that should be used to connect ranges split at the
   // given position.
   ParallelMove* GetConnectingParallelMove(LifetimePosition pos);
 
   // Return the block which contains give lifetime position.
   const InstructionBlock* GetInstructionBlock(LifetimePosition pos);
 
   // Helper methods for the fixed registers.
   int RegisterCount() const;
   static int FixedLiveRangeID(int index) { return -index - 1; }
   static int FixedDoubleLiveRangeID(int index);
   LiveRange* FixedLiveRangeFor(int index);
   LiveRange* FixedDoubleLiveRangeFor(int index);
   LiveRange* LiveRangeFor(int index);
   GapInstruction* GetLastGap(const InstructionBlock* block);
 
   const char* RegisterName(int allocation_index);
 
-  inline Instruction* InstructionAt(int index) {
-    return code()->InstructionAt(index);
-  }
+  Instruction* InstructionAt(int index) { return code()->InstructionAt(index); }
 
   Frame* frame() const { return frame_; }
+  const char* debug_name() const { return debug_name_; }
 
   Zone* const zone_;
   Frame* const frame_;
-  CompilationInfo* const info_;
   InstructionSequence* const code_;
+  const char* const debug_name_;
 
   // During liveness analysis keep a mapping from block id to live_in sets
   // for blocks already analyzed.
   ZoneList<BitVector*> live_in_sets_;
 
   // Liveness analysis results.
   ZoneList<LiveRange*> live_ranges_;
 
   // Lists of live ranges
   EmbeddedVector<LiveRange*, Register::kMaxNumAllocatableRegisters>
@@ skipping 19 matching lines @@
 #endif
 
   DISALLOW_COPY_AND_ASSIGN(RegisterAllocator);
 };
 
 }
 }
 }  // namespace v8::internal::compiler
 
 #endif  // V8_REGISTER_ALLOCATOR_H_