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Issue 6691054: [Arguments] Merge (7442,7496] from bleeding_edge. (Closed) Base URL: https://v8.googlecode.com/svn/branches/experimental/arguments
Patch Set: Created 9 years, 8 months ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 30 matching lines...) Expand all
41 #include "disassembler.h" 41 #include "disassembler.h"
42 #include "macro-assembler.h" 42 #include "macro-assembler.h"
43 #include "serialize.h" 43 #include "serialize.h"
44 44
45 namespace v8 { 45 namespace v8 {
46 namespace internal { 46 namespace internal {
47 47
48 // ----------------------------------------------------------------------------- 48 // -----------------------------------------------------------------------------
49 // Implementation of CpuFeatures 49 // Implementation of CpuFeatures
50 50
51 CpuFeatures::CpuFeatures() 51 #ifdef DEBUG
52 : supported_(0), 52 bool CpuFeatures::initialized_ = false;
53 enabled_(0), 53 #endif
54 found_by_runtime_probing_(0) { 54 uint64_t CpuFeatures::supported_ = 0;
55 } 55 uint64_t CpuFeatures::found_by_runtime_probing_ = 0;
56 56
57 57
58 // The Probe method needs executable memory, so it uses Heap::CreateCode. 58 void CpuFeatures::Probe() {
59 // Allocation failure is silent and leads to safe default. 59 ASSERT(!initialized_);
60 void CpuFeatures::Probe(bool portable) {
61 ASSERT(HEAP->HasBeenSetup());
62 ASSERT(supported_ == 0); 60 ASSERT(supported_ == 0);
63 if (portable && Serializer::enabled()) { 61 #ifdef DEBUG
62 initialized_ = true;
63 #endif
64 if (Serializer::enabled()) {
64 supported_ |= OS::CpuFeaturesImpliedByPlatform(); 65 supported_ |= OS::CpuFeaturesImpliedByPlatform();
65 return; // No features if we might serialize. 66 return; // No features if we might serialize.
66 } 67 }
67 68
68 Assembler assm(NULL, 0); 69 const int kBufferSize = 4 * KB;
70 VirtualMemory* memory = new VirtualMemory(kBufferSize);
71 if (!memory->IsReserved()) {
72 delete memory;
73 return;
74 }
75 ASSERT(memory->size() >= static_cast<size_t>(kBufferSize));
76 if (!memory->Commit(memory->address(), kBufferSize, true/*executable*/)) {
77 delete memory;
78 return;
79 }
80
81 Assembler assm(NULL, memory->address(), kBufferSize);
69 Label cpuid, done; 82 Label cpuid, done;
70 #define __ assm. 83 #define __ assm.
71 // Save old esp, since we are going to modify the stack. 84 // Save old esp, since we are going to modify the stack.
72 __ push(ebp); 85 __ push(ebp);
73 __ pushfd(); 86 __ pushfd();
74 __ push(ecx); 87 __ push(ecx);
75 __ push(ebx); 88 __ push(ebx);
76 __ mov(ebp, Operand(esp)); 89 __ mov(ebp, Operand(esp));
77 90
78 // If we can modify bit 21 of the EFLAGS register, then CPUID is supported. 91 // If we can modify bit 21 of the EFLAGS register, then CPUID is supported.
(...skipping 33 matching lines...) Expand 10 before | Expand all | Expand 10 after
112 // Done. 125 // Done.
113 __ bind(&done); 126 __ bind(&done);
114 __ mov(esp, Operand(ebp)); 127 __ mov(esp, Operand(ebp));
115 __ pop(ebx); 128 __ pop(ebx);
116 __ pop(ecx); 129 __ pop(ecx);
117 __ popfd(); 130 __ popfd();
118 __ pop(ebp); 131 __ pop(ebp);
119 __ ret(0); 132 __ ret(0);
120 #undef __ 133 #undef __
121 134
122 CodeDesc desc;
123 assm.GetCode(&desc);
124 Object* code;
125 { MaybeObject* maybe_code =
126 assm.isolate()->heap()->CreateCode(desc,
127 Code::ComputeFlags(Code::STUB),
128 Handle<Code>::null());
129 if (!maybe_code->ToObject(&code)) return;
130 }
131 if (!code->IsCode()) return;
132
133 PROFILE(ISOLATE,
134 CodeCreateEvent(Logger::BUILTIN_TAG,
135 Code::cast(code), "CpuFeatures::Probe"));
136 typedef uint64_t (*F0)(); 135 typedef uint64_t (*F0)();
137 F0 probe = FUNCTION_CAST<F0>(Code::cast(code)->entry()); 136 F0 probe = FUNCTION_CAST<F0>(reinterpret_cast<Address>(memory->address()));
138 supported_ = probe(); 137 supported_ = probe();
139 found_by_runtime_probing_ = supported_; 138 found_by_runtime_probing_ = supported_;
140 uint64_t os_guarantees = OS::CpuFeaturesImpliedByPlatform(); 139 uint64_t os_guarantees = OS::CpuFeaturesImpliedByPlatform();
141 supported_ |= os_guarantees; 140 supported_ |= os_guarantees;
142 found_by_runtime_probing_ &= portable ? ~os_guarantees : 0; 141 found_by_runtime_probing_ &= ~os_guarantees;
142
143 delete memory;
143 } 144 }
144 145
145 146
146 // ----------------------------------------------------------------------------- 147 // -----------------------------------------------------------------------------
147 // Implementation of Displacement 148 // Implementation of Displacement
148 149
149 void Displacement::init(Label* L, Type type) { 150 void Displacement::init(Label* L, Type type) {
150 ASSERT(!L->is_bound()); 151 ASSERT(!L->is_bound());
151 int next = 0; 152 int next = 0;
152 if (L->is_linked()) { 153 if (L->is_linked()) {
(...skipping 137 matching lines...) Expand 10 before | Expand all | Expand 10 after
290 291
291 // Emit a single byte. Must always be inlined. 292 // Emit a single byte. Must always be inlined.
292 #define EMIT(x) \ 293 #define EMIT(x) \
293 *pc_++ = (x) 294 *pc_++ = (x)
294 295
295 296
296 #ifdef GENERATED_CODE_COVERAGE 297 #ifdef GENERATED_CODE_COVERAGE
297 static void InitCoverageLog(); 298 static void InitCoverageLog();
298 #endif 299 #endif
299 300
300 Assembler::Assembler(void* buffer, int buffer_size) 301 Assembler::Assembler(Isolate* arg_isolate, void* buffer, int buffer_size)
301 : AssemblerBase(Isolate::Current()), 302 : AssemblerBase(arg_isolate),
302 positions_recorder_(this), 303 positions_recorder_(this),
303 emit_debug_code_(FLAG_debug_code) { 304 emit_debug_code_(FLAG_debug_code) {
304 if (buffer == NULL) { 305 if (buffer == NULL) {
305 // Do our own buffer management. 306 // Do our own buffer management.
306 if (buffer_size <= kMinimalBufferSize) { 307 if (buffer_size <= kMinimalBufferSize) {
307 buffer_size = kMinimalBufferSize; 308 buffer_size = kMinimalBufferSize;
308 309
309 if (isolate()->assembler_spare_buffer() != NULL) { 310 if (isolate()->assembler_spare_buffer() != NULL) {
310 buffer = isolate()->assembler_spare_buffer(); 311 buffer = isolate()->assembler_spare_buffer();
311 isolate()->set_assembler_spare_buffer(NULL); 312 isolate()->set_assembler_spare_buffer(NULL);
(...skipping 67 matching lines...) Expand 10 before | Expand all | Expand 10 after
379 } 380 }
380 } 381 }
381 382
382 383
383 void Assembler::CodeTargetAlign() { 384 void Assembler::CodeTargetAlign() {
384 Align(16); // Preferred alignment of jump targets on ia32. 385 Align(16); // Preferred alignment of jump targets on ia32.
385 } 386 }
386 387
387 388
388 void Assembler::cpuid() { 389 void Assembler::cpuid() {
389 ASSERT(isolate()->cpu_features()->IsEnabled(CPUID)); 390 ASSERT(CpuFeatures::IsEnabled(CPUID));
390 EnsureSpace ensure_space(this); 391 EnsureSpace ensure_space(this);
391 last_pc_ = pc_; 392 last_pc_ = pc_;
392 EMIT(0x0F); 393 EMIT(0x0F);
393 EMIT(0xA2); 394 EMIT(0xA2);
394 } 395 }
395 396
396 397
397 void Assembler::pushad() { 398 void Assembler::pushad() {
398 EnsureSpace ensure_space(this); 399 EnsureSpace ensure_space(this);
399 last_pc_ = pc_; 400 last_pc_ = pc_;
(...skipping 340 matching lines...) Expand 10 before | Expand all | Expand 10 after
740 void Assembler::movzx_w(Register dst, const Operand& src) { 741 void Assembler::movzx_w(Register dst, const Operand& src) {
741 EnsureSpace ensure_space(this); 742 EnsureSpace ensure_space(this);
742 last_pc_ = pc_; 743 last_pc_ = pc_;
743 EMIT(0x0F); 744 EMIT(0x0F);
744 EMIT(0xB7); 745 EMIT(0xB7);
745 emit_operand(dst, src); 746 emit_operand(dst, src);
746 } 747 }
747 748
748 749
749 void Assembler::cmov(Condition cc, Register dst, int32_t imm32) { 750 void Assembler::cmov(Condition cc, Register dst, int32_t imm32) {
750 ASSERT(isolate()->cpu_features()->IsEnabled(CMOV)); 751 ASSERT(CpuFeatures::IsEnabled(CMOV));
751 EnsureSpace ensure_space(this); 752 EnsureSpace ensure_space(this);
752 last_pc_ = pc_; 753 last_pc_ = pc_;
753 UNIMPLEMENTED(); 754 UNIMPLEMENTED();
754 USE(cc); 755 USE(cc);
755 USE(dst); 756 USE(dst);
756 USE(imm32); 757 USE(imm32);
757 } 758 }
758 759
759 760
760 void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) { 761 void Assembler::cmov(Condition cc, Register dst, Handle<Object> handle) {
761 ASSERT(isolate()->cpu_features()->IsEnabled(CMOV)); 762 ASSERT(CpuFeatures::IsEnabled(CMOV));
762 EnsureSpace ensure_space(this); 763 EnsureSpace ensure_space(this);
763 last_pc_ = pc_; 764 last_pc_ = pc_;
764 UNIMPLEMENTED(); 765 UNIMPLEMENTED();
765 USE(cc); 766 USE(cc);
766 USE(dst); 767 USE(dst);
767 USE(handle); 768 USE(handle);
768 } 769 }
769 770
770 771
771 void Assembler::cmov(Condition cc, Register dst, const Operand& src) { 772 void Assembler::cmov(Condition cc, Register dst, const Operand& src) {
772 ASSERT(isolate()->cpu_features()->IsEnabled(CMOV)); 773 ASSERT(CpuFeatures::IsEnabled(CMOV));
773 EnsureSpace ensure_space(this); 774 EnsureSpace ensure_space(this);
774 last_pc_ = pc_; 775 last_pc_ = pc_;
775 // Opcode: 0f 40 + cc /r. 776 // Opcode: 0f 40 + cc /r.
776 EMIT(0x0F); 777 EMIT(0x0F);
777 EMIT(0x40 + cc); 778 EMIT(0x40 + cc);
778 emit_operand(dst, src); 779 emit_operand(dst, src);
779 } 780 }
780 781
781 782
782 void Assembler::cld() { 783 void Assembler::cld() {
(...skipping 660 matching lines...) Expand 10 before | Expand all | Expand 10 after
1443 1444
1444 1445
1445 void Assembler::nop() { 1446 void Assembler::nop() {
1446 EnsureSpace ensure_space(this); 1447 EnsureSpace ensure_space(this);
1447 last_pc_ = pc_; 1448 last_pc_ = pc_;
1448 EMIT(0x90); 1449 EMIT(0x90);
1449 } 1450 }
1450 1451
1451 1452
1452 void Assembler::rdtsc() { 1453 void Assembler::rdtsc() {
1453 ASSERT(isolate()->cpu_features()->IsEnabled(RDTSC)); 1454 ASSERT(CpuFeatures::IsEnabled(RDTSC));
1454 EnsureSpace ensure_space(this); 1455 EnsureSpace ensure_space(this);
1455 last_pc_ = pc_; 1456 last_pc_ = pc_;
1456 EMIT(0x0F); 1457 EMIT(0x0F);
1457 EMIT(0x31); 1458 EMIT(0x31);
1458 } 1459 }
1459 1460
1460 1461
1461 void Assembler::ret(int imm16) { 1462 void Assembler::ret(int imm16) {
1462 EnsureSpace ensure_space(this); 1463 EnsureSpace ensure_space(this);
1463 last_pc_ = pc_; 1464 last_pc_ = pc_;
(...skipping 385 matching lines...) Expand 10 before | Expand all | Expand 10 after
1849 1850
1850 void Assembler::fistp_s(const Operand& adr) { 1851 void Assembler::fistp_s(const Operand& adr) {
1851 EnsureSpace ensure_space(this); 1852 EnsureSpace ensure_space(this);
1852 last_pc_ = pc_; 1853 last_pc_ = pc_;
1853 EMIT(0xDB); 1854 EMIT(0xDB);
1854 emit_operand(ebx, adr); 1855 emit_operand(ebx, adr);
1855 } 1856 }
1856 1857
1857 1858
1858 void Assembler::fisttp_s(const Operand& adr) { 1859 void Assembler::fisttp_s(const Operand& adr) {
1859 ASSERT(isolate()->cpu_features()->IsEnabled(SSE3)); 1860 ASSERT(CpuFeatures::IsEnabled(SSE3));
1860 EnsureSpace ensure_space(this); 1861 EnsureSpace ensure_space(this);
1861 last_pc_ = pc_; 1862 last_pc_ = pc_;
1862 EMIT(0xDB); 1863 EMIT(0xDB);
1863 emit_operand(ecx, adr); 1864 emit_operand(ecx, adr);
1864 } 1865 }
1865 1866
1866 1867
1867 void Assembler::fisttp_d(const Operand& adr) { 1868 void Assembler::fisttp_d(const Operand& adr) {
1868 ASSERT(isolate()->cpu_features()->IsEnabled(SSE3)); 1869 ASSERT(CpuFeatures::IsEnabled(SSE3));
1869 EnsureSpace ensure_space(this); 1870 EnsureSpace ensure_space(this);
1870 last_pc_ = pc_; 1871 last_pc_ = pc_;
1871 EMIT(0xDD); 1872 EMIT(0xDD);
1872 emit_operand(ecx, adr); 1873 emit_operand(ecx, adr);
1873 } 1874 }
1874 1875
1875 1876
1876 void Assembler::fist_s(const Operand& adr) { 1877 void Assembler::fist_s(const Operand& adr) {
1877 EnsureSpace ensure_space(this); 1878 EnsureSpace ensure_space(this);
1878 last_pc_ = pc_; 1879 last_pc_ = pc_;
(...skipping 248 matching lines...) Expand 10 before | Expand all | Expand 10 after
2127 ASSERT(reg.is_byte_register()); 2128 ASSERT(reg.is_byte_register());
2128 EnsureSpace ensure_space(this); 2129 EnsureSpace ensure_space(this);
2129 last_pc_ = pc_; 2130 last_pc_ = pc_;
2130 EMIT(0x0F); 2131 EMIT(0x0F);
2131 EMIT(0x90 | cc); 2132 EMIT(0x90 | cc);
2132 EMIT(0xC0 | reg.code()); 2133 EMIT(0xC0 | reg.code());
2133 } 2134 }
2134 2135
2135 2136
2136 void Assembler::cvttss2si(Register dst, const Operand& src) { 2137 void Assembler::cvttss2si(Register dst, const Operand& src) {
2137 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2138 ASSERT(CpuFeatures::IsEnabled(SSE2));
2138 EnsureSpace ensure_space(this); 2139 EnsureSpace ensure_space(this);
2139 last_pc_ = pc_; 2140 last_pc_ = pc_;
2140 EMIT(0xF3); 2141 EMIT(0xF3);
2141 EMIT(0x0F); 2142 EMIT(0x0F);
2142 EMIT(0x2C); 2143 EMIT(0x2C);
2143 emit_operand(dst, src); 2144 emit_operand(dst, src);
2144 } 2145 }
2145 2146
2146 2147
2147 void Assembler::cvttsd2si(Register dst, const Operand& src) { 2148 void Assembler::cvttsd2si(Register dst, const Operand& src) {
2148 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2149 ASSERT(CpuFeatures::IsEnabled(SSE2));
2149 EnsureSpace ensure_space(this); 2150 EnsureSpace ensure_space(this);
2150 last_pc_ = pc_; 2151 last_pc_ = pc_;
2151 EMIT(0xF2); 2152 EMIT(0xF2);
2152 EMIT(0x0F); 2153 EMIT(0x0F);
2153 EMIT(0x2C); 2154 EMIT(0x2C);
2154 emit_operand(dst, src); 2155 emit_operand(dst, src);
2155 } 2156 }
2156 2157
2157 2158
2158 void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) { 2159 void Assembler::cvtsi2sd(XMMRegister dst, const Operand& src) {
2159 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2160 ASSERT(CpuFeatures::IsEnabled(SSE2));
2160 EnsureSpace ensure_space(this); 2161 EnsureSpace ensure_space(this);
2161 last_pc_ = pc_; 2162 last_pc_ = pc_;
2162 EMIT(0xF2); 2163 EMIT(0xF2);
2163 EMIT(0x0F); 2164 EMIT(0x0F);
2164 EMIT(0x2A); 2165 EMIT(0x2A);
2165 emit_sse_operand(dst, src); 2166 emit_sse_operand(dst, src);
2166 } 2167 }
2167 2168
2168 2169
2169 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) { 2170 void Assembler::cvtss2sd(XMMRegister dst, XMMRegister src) {
2170 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2171 ASSERT(CpuFeatures::IsEnabled(SSE2));
2171 EnsureSpace ensure_space(this); 2172 EnsureSpace ensure_space(this);
2172 last_pc_ = pc_; 2173 last_pc_ = pc_;
2173 EMIT(0xF3); 2174 EMIT(0xF3);
2174 EMIT(0x0F); 2175 EMIT(0x0F);
2175 EMIT(0x5A); 2176 EMIT(0x5A);
2176 emit_sse_operand(dst, src); 2177 emit_sse_operand(dst, src);
2177 } 2178 }
2178 2179
2179 2180
2180 void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) { 2181 void Assembler::cvtsd2ss(XMMRegister dst, XMMRegister src) {
2181 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2182 ASSERT(CpuFeatures::IsEnabled(SSE2));
2182 EnsureSpace ensure_space(this); 2183 EnsureSpace ensure_space(this);
2183 last_pc_ = pc_; 2184 last_pc_ = pc_;
2184 EMIT(0xF2); 2185 EMIT(0xF2);
2185 EMIT(0x0F); 2186 EMIT(0x0F);
2186 EMIT(0x5A); 2187 EMIT(0x5A);
2187 emit_sse_operand(dst, src); 2188 emit_sse_operand(dst, src);
2188 } 2189 }
2189 2190
2190 2191
2191 void Assembler::addsd(XMMRegister dst, XMMRegister src) { 2192 void Assembler::addsd(XMMRegister dst, XMMRegister src) {
2192 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2193 ASSERT(CpuFeatures::IsEnabled(SSE2));
2193 EnsureSpace ensure_space(this); 2194 EnsureSpace ensure_space(this);
2194 last_pc_ = pc_; 2195 last_pc_ = pc_;
2195 EMIT(0xF2); 2196 EMIT(0xF2);
2196 EMIT(0x0F); 2197 EMIT(0x0F);
2197 EMIT(0x58); 2198 EMIT(0x58);
2198 emit_sse_operand(dst, src); 2199 emit_sse_operand(dst, src);
2199 } 2200 }
2200 2201
2201 2202
2202 void Assembler::mulsd(XMMRegister dst, XMMRegister src) { 2203 void Assembler::mulsd(XMMRegister dst, XMMRegister src) {
2203 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2204 ASSERT(CpuFeatures::IsEnabled(SSE2));
2204 EnsureSpace ensure_space(this); 2205 EnsureSpace ensure_space(this);
2205 last_pc_ = pc_; 2206 last_pc_ = pc_;
2206 EMIT(0xF2); 2207 EMIT(0xF2);
2207 EMIT(0x0F); 2208 EMIT(0x0F);
2208 EMIT(0x59); 2209 EMIT(0x59);
2209 emit_sse_operand(dst, src); 2210 emit_sse_operand(dst, src);
2210 } 2211 }
2211 2212
2212 2213
2213 void Assembler::subsd(XMMRegister dst, XMMRegister src) { 2214 void Assembler::subsd(XMMRegister dst, XMMRegister src) {
2214 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2215 ASSERT(CpuFeatures::IsEnabled(SSE2));
2215 EnsureSpace ensure_space(this); 2216 EnsureSpace ensure_space(this);
2216 last_pc_ = pc_; 2217 last_pc_ = pc_;
2217 EMIT(0xF2); 2218 EMIT(0xF2);
2218 EMIT(0x0F); 2219 EMIT(0x0F);
2219 EMIT(0x5C); 2220 EMIT(0x5C);
2220 emit_sse_operand(dst, src); 2221 emit_sse_operand(dst, src);
2221 } 2222 }
2222 2223
2223 2224
2224 void Assembler::divsd(XMMRegister dst, XMMRegister src) { 2225 void Assembler::divsd(XMMRegister dst, XMMRegister src) {
2225 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2226 ASSERT(CpuFeatures::IsEnabled(SSE2));
2226 EnsureSpace ensure_space(this); 2227 EnsureSpace ensure_space(this);
2227 last_pc_ = pc_; 2228 last_pc_ = pc_;
2228 EMIT(0xF2); 2229 EMIT(0xF2);
2229 EMIT(0x0F); 2230 EMIT(0x0F);
2230 EMIT(0x5E); 2231 EMIT(0x5E);
2231 emit_sse_operand(dst, src); 2232 emit_sse_operand(dst, src);
2232 } 2233 }
2233 2234
2234 2235
2235 void Assembler::xorpd(XMMRegister dst, XMMRegister src) { 2236 void Assembler::xorpd(XMMRegister dst, XMMRegister src) {
2236 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2237 ASSERT(CpuFeatures::IsEnabled(SSE2));
2237 EnsureSpace ensure_space(this); 2238 EnsureSpace ensure_space(this);
2238 last_pc_ = pc_; 2239 last_pc_ = pc_;
2239 EMIT(0x66); 2240 EMIT(0x66);
2240 EMIT(0x0F); 2241 EMIT(0x0F);
2241 EMIT(0x57); 2242 EMIT(0x57);
2242 emit_sse_operand(dst, src); 2243 emit_sse_operand(dst, src);
2243 } 2244 }
2244 2245
2245 2246
2246 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) { 2247 void Assembler::sqrtsd(XMMRegister dst, XMMRegister src) {
(...skipping 10 matching lines...) Expand all
2257 EnsureSpace ensure_space(this); 2258 EnsureSpace ensure_space(this);
2258 last_pc_ = pc_; 2259 last_pc_ = pc_;
2259 EMIT(0x66); 2260 EMIT(0x66);
2260 EMIT(0x0F); 2261 EMIT(0x0F);
2261 EMIT(0x54); 2262 EMIT(0x54);
2262 emit_sse_operand(dst, src); 2263 emit_sse_operand(dst, src);
2263 } 2264 }
2264 2265
2265 2266
2266 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) { 2267 void Assembler::ucomisd(XMMRegister dst, XMMRegister src) {
2267 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2268 ASSERT(CpuFeatures::IsEnabled(SSE2));
2268 EnsureSpace ensure_space(this); 2269 EnsureSpace ensure_space(this);
2269 last_pc_ = pc_; 2270 last_pc_ = pc_;
2270 EMIT(0x66); 2271 EMIT(0x66);
2271 EMIT(0x0F); 2272 EMIT(0x0F);
2272 EMIT(0x2E); 2273 EMIT(0x2E);
2273 emit_sse_operand(dst, src); 2274 emit_sse_operand(dst, src);
2274 } 2275 }
2275 2276
2276 2277
2277 void Assembler::movmskpd(Register dst, XMMRegister src) { 2278 void Assembler::movmskpd(Register dst, XMMRegister src) {
2278 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2279 ASSERT(CpuFeatures::IsEnabled(SSE2));
2279 EnsureSpace ensure_space(this); 2280 EnsureSpace ensure_space(this);
2280 last_pc_ = pc_; 2281 last_pc_ = pc_;
2281 EMIT(0x66); 2282 EMIT(0x66);
2282 EMIT(0x0F); 2283 EMIT(0x0F);
2283 EMIT(0x50); 2284 EMIT(0x50);
2284 emit_sse_operand(dst, src); 2285 emit_sse_operand(dst, src);
2285 } 2286 }
2286 2287
2287 2288
2288 void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) { 2289 void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) {
2289 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2290 ASSERT(CpuFeatures::IsEnabled(SSE2));
2290 EnsureSpace ensure_space(this); 2291 EnsureSpace ensure_space(this);
2291 last_pc_ = pc_; 2292 last_pc_ = pc_;
2292 EMIT(0xF2); 2293 EMIT(0xF2);
2293 EMIT(0x0F); 2294 EMIT(0x0F);
2294 EMIT(0xC2); 2295 EMIT(0xC2);
2295 emit_sse_operand(dst, src); 2296 emit_sse_operand(dst, src);
2296 EMIT(1); // LT == 1 2297 EMIT(1); // LT == 1
2297 } 2298 }
2298 2299
2299 2300
2300 void Assembler::movaps(XMMRegister dst, XMMRegister src) { 2301 void Assembler::movaps(XMMRegister dst, XMMRegister src) {
2301 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2302 ASSERT(CpuFeatures::IsEnabled(SSE2));
2302 EnsureSpace ensure_space(this); 2303 EnsureSpace ensure_space(this);
2303 last_pc_ = pc_; 2304 last_pc_ = pc_;
2304 EMIT(0x0F); 2305 EMIT(0x0F);
2305 EMIT(0x28); 2306 EMIT(0x28);
2306 emit_sse_operand(dst, src); 2307 emit_sse_operand(dst, src);
2307 } 2308 }
2308 2309
2309 2310
2310 void Assembler::movdqa(const Operand& dst, XMMRegister src) { 2311 void Assembler::movdqa(const Operand& dst, XMMRegister src) {
2311 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2312 ASSERT(CpuFeatures::IsEnabled(SSE2));
2312 EnsureSpace ensure_space(this); 2313 EnsureSpace ensure_space(this);
2313 last_pc_ = pc_; 2314 last_pc_ = pc_;
2314 EMIT(0x66); 2315 EMIT(0x66);
2315 EMIT(0x0F); 2316 EMIT(0x0F);
2316 EMIT(0x7F); 2317 EMIT(0x7F);
2317 emit_sse_operand(src, dst); 2318 emit_sse_operand(src, dst);
2318 } 2319 }
2319 2320
2320 2321
2321 void Assembler::movdqa(XMMRegister dst, const Operand& src) { 2322 void Assembler::movdqa(XMMRegister dst, const Operand& src) {
2322 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2323 ASSERT(CpuFeatures::IsEnabled(SSE2));
2323 EnsureSpace ensure_space(this); 2324 EnsureSpace ensure_space(this);
2324 last_pc_ = pc_; 2325 last_pc_ = pc_;
2325 EMIT(0x66); 2326 EMIT(0x66);
2326 EMIT(0x0F); 2327 EMIT(0x0F);
2327 EMIT(0x6F); 2328 EMIT(0x6F);
2328 emit_sse_operand(dst, src); 2329 emit_sse_operand(dst, src);
2329 } 2330 }
2330 2331
2331 2332
2332 void Assembler::movdqu(const Operand& dst, XMMRegister src ) { 2333 void Assembler::movdqu(const Operand& dst, XMMRegister src ) {
2333 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2334 ASSERT(CpuFeatures::IsEnabled(SSE2));
2334 EnsureSpace ensure_space(this); 2335 EnsureSpace ensure_space(this);
2335 last_pc_ = pc_; 2336 last_pc_ = pc_;
2336 EMIT(0xF3); 2337 EMIT(0xF3);
2337 EMIT(0x0F); 2338 EMIT(0x0F);
2338 EMIT(0x7F); 2339 EMIT(0x7F);
2339 emit_sse_operand(src, dst); 2340 emit_sse_operand(src, dst);
2340 } 2341 }
2341 2342
2342 2343
2343 void Assembler::movdqu(XMMRegister dst, const Operand& src) { 2344 void Assembler::movdqu(XMMRegister dst, const Operand& src) {
2344 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2345 ASSERT(CpuFeatures::IsEnabled(SSE2));
2345 EnsureSpace ensure_space(this); 2346 EnsureSpace ensure_space(this);
2346 last_pc_ = pc_; 2347 last_pc_ = pc_;
2347 EMIT(0xF3); 2348 EMIT(0xF3);
2348 EMIT(0x0F); 2349 EMIT(0x0F);
2349 EMIT(0x6F); 2350 EMIT(0x6F);
2350 emit_sse_operand(dst, src); 2351 emit_sse_operand(dst, src);
2351 } 2352 }
2352 2353
2353 2354
2354 void Assembler::movntdqa(XMMRegister dst, const Operand& src) { 2355 void Assembler::movntdqa(XMMRegister dst, const Operand& src) {
2355 ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1)); 2356 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2356 EnsureSpace ensure_space(this); 2357 EnsureSpace ensure_space(this);
2357 last_pc_ = pc_; 2358 last_pc_ = pc_;
2358 EMIT(0x66); 2359 EMIT(0x66);
2359 EMIT(0x0F); 2360 EMIT(0x0F);
2360 EMIT(0x38); 2361 EMIT(0x38);
2361 EMIT(0x2A); 2362 EMIT(0x2A);
2362 emit_sse_operand(dst, src); 2363 emit_sse_operand(dst, src);
2363 } 2364 }
2364 2365
2365 2366
2366 void Assembler::movntdq(const Operand& dst, XMMRegister src) { 2367 void Assembler::movntdq(const Operand& dst, XMMRegister src) {
2367 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2368 ASSERT(CpuFeatures::IsEnabled(SSE2));
2368 EnsureSpace ensure_space(this); 2369 EnsureSpace ensure_space(this);
2369 last_pc_ = pc_; 2370 last_pc_ = pc_;
2370 EMIT(0x66); 2371 EMIT(0x66);
2371 EMIT(0x0F); 2372 EMIT(0x0F);
2372 EMIT(0xE7); 2373 EMIT(0xE7);
2373 emit_sse_operand(src, dst); 2374 emit_sse_operand(src, dst);
2374 } 2375 }
2375 2376
2376 2377
2377 void Assembler::prefetch(const Operand& src, int level) { 2378 void Assembler::prefetch(const Operand& src, int level) {
(...skipping 15 matching lines...) Expand all
2393 2394
2394 2395
2395 void Assembler::movdbl(const Operand& dst, XMMRegister src) { 2396 void Assembler::movdbl(const Operand& dst, XMMRegister src) {
2396 EnsureSpace ensure_space(this); 2397 EnsureSpace ensure_space(this);
2397 last_pc_ = pc_; 2398 last_pc_ = pc_;
2398 movsd(dst, src); 2399 movsd(dst, src);
2399 } 2400 }
2400 2401
2401 2402
2402 void Assembler::movsd(const Operand& dst, XMMRegister src ) { 2403 void Assembler::movsd(const Operand& dst, XMMRegister src ) {
2403 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2404 ASSERT(CpuFeatures::IsEnabled(SSE2));
2404 EnsureSpace ensure_space(this); 2405 EnsureSpace ensure_space(this);
2405 last_pc_ = pc_; 2406 last_pc_ = pc_;
2406 EMIT(0xF2); // double 2407 EMIT(0xF2); // double
2407 EMIT(0x0F); 2408 EMIT(0x0F);
2408 EMIT(0x11); // store 2409 EMIT(0x11); // store
2409 emit_sse_operand(src, dst); 2410 emit_sse_operand(src, dst);
2410 } 2411 }
2411 2412
2412 2413
2413 void Assembler::movsd(XMMRegister dst, const Operand& src) { 2414 void Assembler::movsd(XMMRegister dst, const Operand& src) {
2414 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2415 ASSERT(CpuFeatures::IsEnabled(SSE2));
2415 EnsureSpace ensure_space(this); 2416 EnsureSpace ensure_space(this);
2416 last_pc_ = pc_; 2417 last_pc_ = pc_;
2417 EMIT(0xF2); // double 2418 EMIT(0xF2); // double
2418 EMIT(0x0F); 2419 EMIT(0x0F);
2419 EMIT(0x10); // load 2420 EMIT(0x10); // load
2420 emit_sse_operand(dst, src); 2421 emit_sse_operand(dst, src);
2421 } 2422 }
2422 2423
2423 2424
2424 void Assembler::movsd(XMMRegister dst, XMMRegister src) { 2425 void Assembler::movsd(XMMRegister dst, XMMRegister src) {
2425 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2426 ASSERT(CpuFeatures::IsEnabled(SSE2));
2426 EnsureSpace ensure_space(this); 2427 EnsureSpace ensure_space(this);
2427 last_pc_ = pc_; 2428 last_pc_ = pc_;
2428 EMIT(0xF2); 2429 EMIT(0xF2);
2429 EMIT(0x0F); 2430 EMIT(0x0F);
2430 EMIT(0x10); 2431 EMIT(0x10);
2431 emit_sse_operand(dst, src); 2432 emit_sse_operand(dst, src);
2432 } 2433 }
2433 2434
2434 2435
2435 void Assembler::movss(const Operand& dst, XMMRegister src ) { 2436 void Assembler::movss(const Operand& dst, XMMRegister src ) {
2436 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2437 ASSERT(CpuFeatures::IsEnabled(SSE2));
2437 EnsureSpace ensure_space(this); 2438 EnsureSpace ensure_space(this);
2438 last_pc_ = pc_; 2439 last_pc_ = pc_;
2439 EMIT(0xF3); // float 2440 EMIT(0xF3); // float
2440 EMIT(0x0F); 2441 EMIT(0x0F);
2441 EMIT(0x11); // store 2442 EMIT(0x11); // store
2442 emit_sse_operand(src, dst); 2443 emit_sse_operand(src, dst);
2443 } 2444 }
2444 2445
2445 2446
2446 void Assembler::movss(XMMRegister dst, const Operand& src) { 2447 void Assembler::movss(XMMRegister dst, const Operand& src) {
2447 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2448 ASSERT(CpuFeatures::IsEnabled(SSE2));
2448 EnsureSpace ensure_space(this); 2449 EnsureSpace ensure_space(this);
2449 last_pc_ = pc_; 2450 last_pc_ = pc_;
2450 EMIT(0xF3); // float 2451 EMIT(0xF3); // float
2451 EMIT(0x0F); 2452 EMIT(0x0F);
2452 EMIT(0x10); // load 2453 EMIT(0x10); // load
2453 emit_sse_operand(dst, src); 2454 emit_sse_operand(dst, src);
2454 } 2455 }
2455 2456
2456 2457
2457 void Assembler::movss(XMMRegister dst, XMMRegister src) { 2458 void Assembler::movss(XMMRegister dst, XMMRegister src) {
2458 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2459 ASSERT(CpuFeatures::IsEnabled(SSE2));
2459 EnsureSpace ensure_space(this); 2460 EnsureSpace ensure_space(this);
2460 last_pc_ = pc_; 2461 last_pc_ = pc_;
2461 EMIT(0xF3); 2462 EMIT(0xF3);
2462 EMIT(0x0F); 2463 EMIT(0x0F);
2463 EMIT(0x10); 2464 EMIT(0x10);
2464 emit_sse_operand(dst, src); 2465 emit_sse_operand(dst, src);
2465 } 2466 }
2466 2467
2467 2468
2468 void Assembler::movd(XMMRegister dst, const Operand& src) { 2469 void Assembler::movd(XMMRegister dst, const Operand& src) {
2469 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2470 ASSERT(CpuFeatures::IsEnabled(SSE2));
2470 EnsureSpace ensure_space(this); 2471 EnsureSpace ensure_space(this);
2471 last_pc_ = pc_; 2472 last_pc_ = pc_;
2472 EMIT(0x66); 2473 EMIT(0x66);
2473 EMIT(0x0F); 2474 EMIT(0x0F);
2474 EMIT(0x6E); 2475 EMIT(0x6E);
2475 emit_sse_operand(dst, src); 2476 emit_sse_operand(dst, src);
2476 } 2477 }
2477 2478
2478 2479
2479 void Assembler::movd(const Operand& dst, XMMRegister src) { 2480 void Assembler::movd(const Operand& dst, XMMRegister src) {
2480 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2481 ASSERT(CpuFeatures::IsEnabled(SSE2));
2481 EnsureSpace ensure_space(this); 2482 EnsureSpace ensure_space(this);
2482 last_pc_ = pc_; 2483 last_pc_ = pc_;
2483 EMIT(0x66); 2484 EMIT(0x66);
2484 EMIT(0x0F); 2485 EMIT(0x0F);
2485 EMIT(0x7E); 2486 EMIT(0x7E);
2486 emit_sse_operand(src, dst); 2487 emit_sse_operand(src, dst);
2487 } 2488 }
2488 2489
2489 2490
2490 void Assembler::pand(XMMRegister dst, XMMRegister src) { 2491 void Assembler::pand(XMMRegister dst, XMMRegister src) {
2491 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2492 ASSERT(CpuFeatures::IsEnabled(SSE2));
2492 EnsureSpace ensure_space(this); 2493 EnsureSpace ensure_space(this);
2493 last_pc_ = pc_; 2494 last_pc_ = pc_;
2494 EMIT(0x66); 2495 EMIT(0x66);
2495 EMIT(0x0F); 2496 EMIT(0x0F);
2496 EMIT(0xDB); 2497 EMIT(0xDB);
2497 emit_sse_operand(dst, src); 2498 emit_sse_operand(dst, src);
2498 } 2499 }
2499 2500
2500 2501
2501 void Assembler::pxor(XMMRegister dst, XMMRegister src) { 2502 void Assembler::pxor(XMMRegister dst, XMMRegister src) {
2502 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2503 ASSERT(CpuFeatures::IsEnabled(SSE2));
2503 EnsureSpace ensure_space(this); 2504 EnsureSpace ensure_space(this);
2504 last_pc_ = pc_; 2505 last_pc_ = pc_;
2505 EMIT(0x66); 2506 EMIT(0x66);
2506 EMIT(0x0F); 2507 EMIT(0x0F);
2507 EMIT(0xEF); 2508 EMIT(0xEF);
2508 emit_sse_operand(dst, src); 2509 emit_sse_operand(dst, src);
2509 } 2510 }
2510 2511
2511 2512
2512 void Assembler::por(XMMRegister dst, XMMRegister src) { 2513 void Assembler::por(XMMRegister dst, XMMRegister src) {
2513 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2514 ASSERT(CpuFeatures::IsEnabled(SSE2));
2514 EnsureSpace ensure_space(this); 2515 EnsureSpace ensure_space(this);
2515 last_pc_ = pc_; 2516 last_pc_ = pc_;
2516 EMIT(0x66); 2517 EMIT(0x66);
2517 EMIT(0x0F); 2518 EMIT(0x0F);
2518 EMIT(0xEB); 2519 EMIT(0xEB);
2519 emit_sse_operand(dst, src); 2520 emit_sse_operand(dst, src);
2520 } 2521 }
2521 2522
2522 2523
2523 void Assembler::ptest(XMMRegister dst, XMMRegister src) { 2524 void Assembler::ptest(XMMRegister dst, XMMRegister src) {
2524 ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1)); 2525 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2525 EnsureSpace ensure_space(this); 2526 EnsureSpace ensure_space(this);
2526 last_pc_ = pc_; 2527 last_pc_ = pc_;
2527 EMIT(0x66); 2528 EMIT(0x66);
2528 EMIT(0x0F); 2529 EMIT(0x0F);
2529 EMIT(0x38); 2530 EMIT(0x38);
2530 EMIT(0x17); 2531 EMIT(0x17);
2531 emit_sse_operand(dst, src); 2532 emit_sse_operand(dst, src);
2532 } 2533 }
2533 2534
2534 2535
2535 void Assembler::psllq(XMMRegister reg, int8_t shift) { 2536 void Assembler::psllq(XMMRegister reg, int8_t shift) {
2536 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2537 ASSERT(CpuFeatures::IsEnabled(SSE2));
2537 EnsureSpace ensure_space(this); 2538 EnsureSpace ensure_space(this);
2538 last_pc_ = pc_; 2539 last_pc_ = pc_;
2539 EMIT(0x66); 2540 EMIT(0x66);
2540 EMIT(0x0F); 2541 EMIT(0x0F);
2541 EMIT(0x73); 2542 EMIT(0x73);
2542 emit_sse_operand(esi, reg); // esi == 6 2543 emit_sse_operand(esi, reg); // esi == 6
2543 EMIT(shift); 2544 EMIT(shift);
2544 } 2545 }
2545 2546
2546 2547
2547 void Assembler::psllq(XMMRegister dst, XMMRegister src) { 2548 void Assembler::psllq(XMMRegister dst, XMMRegister src) {
2548 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2549 ASSERT(CpuFeatures::IsEnabled(SSE2));
2549 EnsureSpace ensure_space(this); 2550 EnsureSpace ensure_space(this);
2550 last_pc_ = pc_; 2551 last_pc_ = pc_;
2551 EMIT(0x66); 2552 EMIT(0x66);
2552 EMIT(0x0F); 2553 EMIT(0x0F);
2553 EMIT(0xF3); 2554 EMIT(0xF3);
2554 emit_sse_operand(dst, src); 2555 emit_sse_operand(dst, src);
2555 } 2556 }
2556 2557
2557 2558
2558 void Assembler::psrlq(XMMRegister reg, int8_t shift) { 2559 void Assembler::psrlq(XMMRegister reg, int8_t shift) {
2559 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2560 ASSERT(CpuFeatures::IsEnabled(SSE2));
2560 EnsureSpace ensure_space(this); 2561 EnsureSpace ensure_space(this);
2561 last_pc_ = pc_; 2562 last_pc_ = pc_;
2562 EMIT(0x66); 2563 EMIT(0x66);
2563 EMIT(0x0F); 2564 EMIT(0x0F);
2564 EMIT(0x73); 2565 EMIT(0x73);
2565 emit_sse_operand(edx, reg); // edx == 2 2566 emit_sse_operand(edx, reg); // edx == 2
2566 EMIT(shift); 2567 EMIT(shift);
2567 } 2568 }
2568 2569
2569 2570
2570 void Assembler::psrlq(XMMRegister dst, XMMRegister src) { 2571 void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
2571 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2572 ASSERT(CpuFeatures::IsEnabled(SSE2));
2572 EnsureSpace ensure_space(this); 2573 EnsureSpace ensure_space(this);
2573 last_pc_ = pc_; 2574 last_pc_ = pc_;
2574 EMIT(0x66); 2575 EMIT(0x66);
2575 EMIT(0x0F); 2576 EMIT(0x0F);
2576 EMIT(0xD3); 2577 EMIT(0xD3);
2577 emit_sse_operand(dst, src); 2578 emit_sse_operand(dst, src);
2578 } 2579 }
2579 2580
2580 2581
2581 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) { 2582 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) {
2582 ASSERT(isolate()->cpu_features()->IsEnabled(SSE2)); 2583 ASSERT(CpuFeatures::IsEnabled(SSE2));
2583 EnsureSpace ensure_space(this); 2584 EnsureSpace ensure_space(this);
2584 last_pc_ = pc_; 2585 last_pc_ = pc_;
2585 EMIT(0x66); 2586 EMIT(0x66);
2586 EMIT(0x0F); 2587 EMIT(0x0F);
2587 EMIT(0x70); 2588 EMIT(0x70);
2588 emit_sse_operand(dst, src); 2589 emit_sse_operand(dst, src);
2589 EMIT(shuffle); 2590 EMIT(shuffle);
2590 } 2591 }
2591 2592
2592 2593
2593 void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) { 2594 void Assembler::pextrd(const Operand& dst, XMMRegister src, int8_t offset) {
2594 ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1)); 2595 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2595 EnsureSpace ensure_space(this); 2596 EnsureSpace ensure_space(this);
2596 last_pc_ = pc_; 2597 last_pc_ = pc_;
2597 EMIT(0x66); 2598 EMIT(0x66);
2598 EMIT(0x0F); 2599 EMIT(0x0F);
2599 EMIT(0x3A); 2600 EMIT(0x3A);
2600 EMIT(0x16); 2601 EMIT(0x16);
2601 emit_sse_operand(src, dst); 2602 emit_sse_operand(src, dst);
2602 EMIT(offset); 2603 EMIT(offset);
2603 } 2604 }
2604 2605
2605 2606
2606 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) { 2607 void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) {
2607 ASSERT(isolate()->cpu_features()->IsEnabled(SSE4_1)); 2608 ASSERT(CpuFeatures::IsEnabled(SSE4_1));
2608 EnsureSpace ensure_space(this); 2609 EnsureSpace ensure_space(this);
2609 last_pc_ = pc_; 2610 last_pc_ = pc_;
2610 EMIT(0x66); 2611 EMIT(0x66);
2611 EMIT(0x0F); 2612 EMIT(0x0F);
2612 EMIT(0x3A); 2613 EMIT(0x3A);
2613 EMIT(0x22); 2614 EMIT(0x22);
2614 emit_sse_operand(dst, src); 2615 emit_sse_operand(dst, src);
2615 EMIT(offset); 2616 EMIT(offset);
2616 } 2617 }
2617 2618
(...skipping 218 matching lines...) Expand 10 before | Expand all | Expand 10 after
2836 fprintf(coverage_log, "%s\n", file_line); 2837 fprintf(coverage_log, "%s\n", file_line);
2837 fflush(coverage_log); 2838 fflush(coverage_log);
2838 } 2839 }
2839 } 2840 }
2840 2841
2841 #endif 2842 #endif
2842 2843
2843 } } // namespace v8::internal 2844 } } // namespace v8::internal
2844 2845
2845 #endif // V8_TARGET_ARCH_IA32 2846 #endif // V8_TARGET_ARCH_IA32
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