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| 1 /* |
| 2 * Copyright (C) 2011 NVIDIA Corporation. |
| 3 * |
| 4 * This software is licensed under the terms of the GNU General Public |
| 5 * License version 2, as published by the Free Software Foundation, and |
| 6 * may be copied, distributed, and modified under those terms. |
| 7 * |
| 8 * This program is distributed in the hope that it will be useful, |
| 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 * GNU General Public License for more details. |
| 12 * |
| 13 */ |
| 14 |
| 15 #include <linux/delay.h> |
| 16 #include <linux/i2c.h> |
| 17 #include <linux/clk.h> |
| 18 #include <linux/regulator/consumer.h> |
| 19 #include <linux/platform_device.h> |
| 20 #include <linux/dma-mapping.h> |
| 21 |
| 22 #include <media/soc_camera.h> |
| 23 #include <media/tegra_v4l2_camera.h> |
| 24 |
| 25 #include <mach/gpio.h> |
| 26 #include <mach/iomap.h> |
| 27 #include <mach/nvhost.h> |
| 28 |
| 29 #include "gpio-names.h" |
| 30 #include "devices.h" |
| 31 |
| 32 /* I2C adapter ID for the camera board. */ |
| 33 #define TEGRA_CAMERA_I2C_ADAPTER_ID 3 |
| 34 |
| 35 /* GPIOs relevant to camera module. */ |
| 36 #define TEGRA_CAMERA_GPIO_CAM_PWR_EN TEGRA_GPIO_PV4 |
| 37 #define TEGRA_CAMERA_GPIO_CAM_RST TEGRA_GPIO_PU2 |
| 38 #define TEGRA_CAMERA_GPIO_CAM_PWDN TEGRA_GPIO_PU3 |
| 39 |
| 40 static struct regulator *regulator; |
| 41 static struct clk *clk_vi; |
| 42 static struct clk *clk_vi_sensor; |
| 43 static struct clk *clk_csi; |
| 44 static struct clk *clk_isp; |
| 45 static struct clk *clk_csus; |
| 46 |
| 47 static int tegra_camera_enable(struct nvhost_device *ndev) |
| 48 { |
| 49 int err; |
| 50 |
| 51 /* Turn on relevant clocks. */ |
| 52 clk_enable(clk_vi); |
| 53 clk_enable(clk_vi_sensor); |
| 54 clk_enable(clk_csi); |
| 55 clk_enable(clk_isp); |
| 56 clk_enable(clk_csus); |
| 57 |
| 58 /* Turn on power to the camera board. */ |
| 59 regulator = regulator_get(&ndev->dev, "vddio_vi"); |
| 60 if (IS_ERR(regulator)) { |
| 61 dev_info(&ndev->dev, "regulator_get() returned error %ld\n", |
| 62 PTR_ERR(regulator)); |
| 63 err = PTR_ERR(regulator); |
| 64 goto exit; |
| 65 } |
| 66 |
| 67 err = regulator_enable(regulator); |
| 68 if (err != 0) |
| 69 goto exit_regulator_put; |
| 70 |
| 71 /* Set up GPIOs. */ |
| 72 gpio_set_value(TEGRA_CAMERA_GPIO_CAM_PWR_EN, 1); |
| 73 gpio_set_value(TEGRA_CAMERA_GPIO_CAM_RST, 1); |
| 74 gpio_set_value(TEGRA_CAMERA_GPIO_CAM_PWDN, 0); |
| 75 |
| 76 /* Give the sensor time to come out of reset. The OV9740 needs |
| 77 * 8192 clock cycles (from vi_sensor clock) before the first I2C |
| 78 * transaction. |
| 79 */ |
| 80 udelay(1000); |
| 81 |
| 82 return 0; |
| 83 |
| 84 exit_regulator_put: |
| 85 regulator_put(regulator); |
| 86 exit: |
| 87 return err; |
| 88 } |
| 89 |
| 90 static void tegra_camera_disable(struct nvhost_device *ndev) |
| 91 { |
| 92 gpio_set_value(TEGRA_CAMERA_GPIO_CAM_PWDN, 1); |
| 93 gpio_set_value(TEGRA_CAMERA_GPIO_CAM_RST, 0); |
| 94 gpio_set_value(TEGRA_CAMERA_GPIO_CAM_PWR_EN, 0); |
| 95 |
| 96 BUG_ON(!regulator); |
| 97 regulator_disable(regulator); |
| 98 regulator_put(regulator); |
| 99 regulator = NULL; |
| 100 |
| 101 /* Turn off relevant clocks. */ |
| 102 clk_disable(clk_vi); |
| 103 clk_disable(clk_vi_sensor); |
| 104 clk_disable(clk_csi); |
| 105 clk_disable(clk_isp); |
| 106 clk_disable(clk_csus); |
| 107 } |
| 108 |
| 109 static struct i2c_board_info aebl_i2c_bus3_sensor_info = { |
| 110 I2C_BOARD_INFO("mt9m114", 0x48), |
| 111 }; |
| 112 |
| 113 static struct soc_camera_link mt9m114_iclink = { |
| 114 .bus_id = 0, |
| 115 .i2c_adapter_id = TEGRA_CAMERA_I2C_ADAPTER_ID, |
| 116 .board_info = &aebl_i2c_bus3_sensor_info, |
| 117 .module_name = "mt9m114", |
| 118 }; |
| 119 |
| 120 static struct platform_device soc_camera = { |
| 121 .name = "soc-camera-pdrv", |
| 122 .id = 0, |
| 123 .dev = { |
| 124 .platform_data = &mt9m114_iclink, |
| 125 }, |
| 126 }; |
| 127 |
| 128 static struct tegra_camera_platform_data tegra_camera_platform_data = { |
| 129 .enable_camera = tegra_camera_enable, |
| 130 .disable_camera = tegra_camera_disable, |
| 131 .flip_v = 0, |
| 132 .flip_h = 0, |
| 133 }; |
| 134 |
| 135 int __init aebl_sensors_init(void) |
| 136 { |
| 137 int err; |
| 138 |
| 139 tegra_camera_device.dev.platform_data = &tegra_camera_platform_data; |
| 140 |
| 141 tegra_gpio_enable(TEGRA_CAMERA_GPIO_CAM_PWR_EN); |
| 142 err = gpio_request(TEGRA_CAMERA_GPIO_CAM_PWR_EN, "cam_pwr_en"); |
| 143 if (err != 0) |
| 144 goto exit; |
| 145 err = gpio_direction_output(TEGRA_CAMERA_GPIO_CAM_PWR_EN, 0); |
| 146 if (err != 0) |
| 147 goto exit_free_gpio_cam_pwr_en; |
| 148 |
| 149 tegra_gpio_enable(TEGRA_CAMERA_GPIO_CAM_RST); |
| 150 err = gpio_request(TEGRA_CAMERA_GPIO_CAM_RST, "cam_rst"); |
| 151 if (err != 0) |
| 152 goto exit_free_gpio_cam_pwr_en; |
| 153 err = gpio_direction_output(TEGRA_CAMERA_GPIO_CAM_RST, 0); |
| 154 if (err != 0) |
| 155 goto exit_free_gpio_cam_rst; |
| 156 |
| 157 tegra_gpio_enable(TEGRA_CAMERA_GPIO_CAM_PWDN); |
| 158 err = gpio_request(TEGRA_CAMERA_GPIO_CAM_PWDN, "cam_pwdn"); |
| 159 if (err != 0) |
| 160 goto exit_free_gpio_cam_rst; |
| 161 err = gpio_direction_output(TEGRA_CAMERA_GPIO_CAM_PWDN, 0); |
| 162 if (err != 0) |
| 163 goto exit_free_gpio_cam_pwdn; |
| 164 |
| 165 clk_vi = clk_get_sys("tegra_camera", "vi"); |
| 166 if (!clk_vi) |
| 167 pr_warn("Failed to get vi clock\n"); |
| 168 |
| 169 clk_vi_sensor = clk_get_sys("tegra_camera", "vi_sensor"); |
| 170 if (!clk_vi_sensor) |
| 171 pr_warn("Failed to get vi_sensor clock\n"); |
| 172 |
| 173 clk_csi = clk_get_sys("tegra_camera", "csi"); |
| 174 if (!clk_csi) |
| 175 pr_warn("Failed to get csi clock\n"); |
| 176 |
| 177 clk_isp = clk_get_sys("tegra_camera", "isp"); |
| 178 if (!clk_isp) |
| 179 pr_warn("Failed to get isp clock\n"); |
| 180 |
| 181 clk_csus = clk_get_sys("tegra_camera", "csus"); |
| 182 if (!clk_csus) |
| 183 pr_warn("Failed to get csus clock\n"); |
| 184 |
| 185 clk_set_rate(clk_vi_sensor, 24000000); |
| 186 |
| 187 nvhost_device_register(&tegra_camera_device); |
| 188 |
| 189 platform_device_register(&soc_camera); |
| 190 |
| 191 return 0; |
| 192 |
| 193 exit_free_gpio_cam_pwdn: |
| 194 gpio_free(TEGRA_CAMERA_GPIO_CAM_PWDN); |
| 195 exit_free_gpio_cam_rst: |
| 196 gpio_free(TEGRA_CAMERA_GPIO_CAM_RST); |
| 197 exit_free_gpio_cam_pwr_en: |
| 198 gpio_free(TEGRA_CAMERA_GPIO_CAM_PWR_EN); |
| 199 exit: |
| 200 BUG_ON(1); |
| 201 return err; |
| 202 } |
| 203 |
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