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Issue 66193004: Reland 17588: Add signed/unsigned 8-bit and 16-bit Representations to Crankshaft (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Latest version Created 7 years, 1 month ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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933 933
934 934
935 void MacroAssembler::Cvtlsi2sd(XMMRegister dst, const Operand& src) { 935 void MacroAssembler::Cvtlsi2sd(XMMRegister dst, const Operand& src) {
936 xorps(dst, dst); 936 xorps(dst, dst);
937 cvtlsi2sd(dst, src); 937 cvtlsi2sd(dst, src);
938 } 938 }
939 939
940 940
941 void MacroAssembler::Load(Register dst, const Operand& src, Representation r) { 941 void MacroAssembler::Load(Register dst, const Operand& src, Representation r) {
942 ASSERT(!r.IsDouble()); 942 ASSERT(!r.IsDouble());
943 if (r.IsByte()) { 943 if (r.IsInteger8()) {
944 movsxbq(dst, src);
945 } else if (r.IsUInteger8()) {
944 movzxbl(dst, src); 946 movzxbl(dst, src);
947 } else if (r.IsInteger16()) {
948 movsxwq(dst, src);
949 } else if (r.IsUInteger16()) {
950 movzxwl(dst, src);
945 } else if (r.IsInteger32()) { 951 } else if (r.IsInteger32()) {
946 movl(dst, src); 952 movl(dst, src);
947 } else { 953 } else {
948 movq(dst, src); 954 movq(dst, src);
949 } 955 }
950 } 956 }
951 957
952 958
953 void MacroAssembler::Store(const Operand& dst, Register src, Representation r) { 959 void MacroAssembler::Store(const Operand& dst, Register src, Representation r) {
954 ASSERT(!r.IsDouble()); 960 ASSERT(!r.IsDouble());
955 if (r.IsByte()) { 961 if (r.IsInteger8() || r.IsUInteger8()) {
956 movb(dst, src); 962 movb(dst, src);
963 } else if (r.IsInteger16() || r.IsUInteger16()) {
964 movw(dst, src);
957 } else if (r.IsInteger32()) { 965 } else if (r.IsInteger32()) {
958 movl(dst, src); 966 movl(dst, src);
959 } else { 967 } else {
960 movq(dst, src); 968 movq(dst, src);
961 } 969 }
962 } 970 }
963 971
964 972
965 void MacroAssembler::Set(Register dst, int64_t x) { 973 void MacroAssembler::Set(Register dst, int64_t x) {
966 if (x == 0) { 974 if (x == 0) {
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4993 j(equal, found); 5001 j(equal, found);
4994 movq(current, FieldOperand(current, Map::kPrototypeOffset)); 5002 movq(current, FieldOperand(current, Map::kPrototypeOffset));
4995 CompareRoot(current, Heap::kNullValueRootIndex); 5003 CompareRoot(current, Heap::kNullValueRootIndex);
4996 j(not_equal, &loop_again); 5004 j(not_equal, &loop_again);
4997 } 5005 }
4998 5006
4999 5007
5000 } } // namespace v8::internal 5008 } } // namespace v8::internal
5001 5009
5002 #endif // V8_TARGET_ARCH_X64 5010 #endif // V8_TARGET_ARCH_X64
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