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| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
| 6 // are met: | 6 // are met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
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| 981 const Condition cond = al); | 981 const Condition cond = al); |
| 982 void vcvt_f64_f32(const DwVfpRegister dst, | 982 void vcvt_f64_f32(const DwVfpRegister dst, |
| 983 const SwVfpRegister src, | 983 const SwVfpRegister src, |
| 984 ConversionMode mode = RoundToZero, | 984 ConversionMode mode = RoundToZero, |
| 985 const Condition cond = al); | 985 const Condition cond = al); |
| 986 void vcvt_f32_f64(const SwVfpRegister dst, | 986 void vcvt_f32_f64(const SwVfpRegister dst, |
| 987 const DwVfpRegister src, | 987 const DwVfpRegister src, |
| 988 ConversionMode mode = RoundToZero, | 988 ConversionMode mode = RoundToZero, |
| 989 const Condition cond = al); | 989 const Condition cond = al); |
| 990 | 990 |
| 991 void vabs(const DwVfpRegister dst, |
| 992 const DwVfpRegister src, |
| 993 const Condition cond = al); |
| 991 void vadd(const DwVfpRegister dst, | 994 void vadd(const DwVfpRegister dst, |
| 992 const DwVfpRegister src1, | 995 const DwVfpRegister src1, |
| 993 const DwVfpRegister src2, | 996 const DwVfpRegister src2, |
| 994 const Condition cond = al); | 997 const Condition cond = al); |
| 995 void vsub(const DwVfpRegister dst, | 998 void vsub(const DwVfpRegister dst, |
| 996 const DwVfpRegister src1, | 999 const DwVfpRegister src1, |
| 997 const DwVfpRegister src2, | 1000 const DwVfpRegister src2, |
| 998 const Condition cond = al); | 1001 const Condition cond = al); |
| 999 void vmul(const DwVfpRegister dst, | 1002 void vmul(const DwVfpRegister dst, |
| 1000 const DwVfpRegister src1, | 1003 const DwVfpRegister src1, |
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| 1273 public: | 1276 public: |
| 1274 explicit EnsureSpace(Assembler* assembler) { | 1277 explicit EnsureSpace(Assembler* assembler) { |
| 1275 assembler->CheckBuffer(); | 1278 assembler->CheckBuffer(); |
| 1276 } | 1279 } |
| 1277 }; | 1280 }; |
| 1278 | 1281 |
| 1279 | 1282 |
| 1280 } } // namespace v8::internal | 1283 } } // namespace v8::internal |
| 1281 | 1284 |
| 1282 #endif // V8_ARM_ASSEMBLER_ARM_H_ | 1285 #endif // V8_ARM_ASSEMBLER_ARM_H_ |
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