[Isolates] Merge r 6300:6500 from bleeding_edge to isolates.

src/arm/cpu-arm.cc

 // Copyright 2006-2009 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 39 matching lines @@
 }
 
 
 void CPU::FlushICache(void* start, size_t size) {
 #if defined (USE_SIMULATOR)
   // Not generating ARM instructions for C-code. This means that we are
   // building an ARM emulator based target.  We should notify the simulator
   // that the Icache was flushed.
   // None of this code ends up in the snapshot so there are no issues
   // around whether or not to generate the code when building snapshots.
-  assembler::arm::Simulator::FlushICache(
-      Isolate::Current()->simulator_i_cache(), start, size);
+  Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size);
 #else
   // Ideally, we would call
   //   syscall(__ARM_NR_cacheflush, start,
   //           reinterpret_cast<intptr_t>(start) + size, 0);
   // however, syscall(int, ...) is not supported on all platforms, especially
   // not when using EABI, so we call the __ARM_NR_cacheflush syscall directly.
 
   register uint32_t beg asm("a1") = reinterpret_cast<uint32_t>(start);
   register uint32_t end asm("a2") =
       reinterpret_cast<uint32_t>(start) + size;
@@ skipping 63 matching lines @@
 #if !defined (__arm__) || !defined(CAN_USE_ARMV5_INSTRUCTIONS)
   UNIMPLEMENTED();  // when building ARM emulator target
 #else
   asm volatile("bkpt 0");
 #endif
 }
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM