| Index: src/x64/disasm-x64.cc
|
| diff --git a/src/x64/disasm-x64.cc b/src/x64/disasm-x64.cc
|
| index dcbba9fc81af7c96060c77bc4c294adbfe1ed960..86e876a3a6d303d59f874bf8e2c735d6c20de1f5 100644
|
| --- a/src/x64/disasm-x64.cc
|
| +++ b/src/x64/disasm-x64.cc
|
| @@ -252,7 +252,7 @@ static v8::base::LazyInstance<InstructionTable>::type instruction_table =
|
| LAZY_INSTANCE_INITIALIZER;
|
|
|
|
|
| -static InstructionDesc cmov_instructions[16] = {
|
| +static const InstructionDesc cmov_instructions[16] = {
|
| {"cmovo", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false},
|
| {"cmovno", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false},
|
| {"cmovc", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false},
|
| @@ -1808,19 +1808,19 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
|
| //------------------------------------------------------------------------------
|
|
|
|
|
| -static const char* cpu_regs[16] = {
|
| +static const char* const cpu_regs[16] = {
|
| "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
|
| "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
|
| };
|
|
|
|
|
| -static const char* byte_cpu_regs[16] = {
|
| +static const char* const byte_cpu_regs[16] = {
|
| "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
|
| "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
|
| };
|
|
|
|
|
| -static const char* xmm_regs[16] = {
|
| +static const char* const xmm_regs[16] = {
|
| "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
|
| "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"
|
| };
|
|
|