Index: src/x64/assembler-x64.cc |
diff --git a/src/x64/assembler-x64.cc b/src/x64/assembler-x64.cc |
index 6e44253ed5218d40cd45395fff2ec337380a89ad..7965e771f7d7d5d5c7cd05f9568774cdc727e364 100644 |
--- a/src/x64/assembler-x64.cc |
+++ b/src/x64/assembler-x64.cc |
@@ -2614,6 +2614,7 @@ void Assembler::movss(const Operand& src, XMMRegister dst) { |
void Assembler::psllq(XMMRegister reg, byte imm8) { |
EnsureSpace ensure_space(this); |
emit(0x66); |
+ emit_optional_rex_32(reg); |
emit(0x0F); |
emit(0x73); |
emit_sse_operand(rsi, reg); // rsi == 6 |
@@ -2621,6 +2622,39 @@ void Assembler::psllq(XMMRegister reg, byte imm8) { |
} |
+void Assembler::psrlq(XMMRegister reg, byte imm8) { |
+ EnsureSpace ensure_space(this); |
+ emit(0x66); |
+ emit_optional_rex_32(reg); |
+ emit(0x0F); |
+ emit(0x73); |
+ emit_sse_operand(rdx, reg); // rdx == 2 |
+ emit(imm8); |
+} |
+ |
+ |
+void Assembler::pslld(XMMRegister reg, byte imm8) { |
+ EnsureSpace ensure_space(this); |
+ emit(0x66); |
+ emit_optional_rex_32(reg); |
+ emit(0x0F); |
+ emit(0x72); |
+ emit_sse_operand(rsi, reg); // rsi == 6 |
+ emit(imm8); |
+} |
+ |
+ |
+void Assembler::psrld(XMMRegister reg, byte imm8) { |
+ EnsureSpace ensure_space(this); |
+ emit(0x66); |
+ emit_optional_rex_32(reg); |
+ emit(0x0F); |
+ emit(0x72); |
+ emit_sse_operand(rdx, reg); // rdx == 2 |
+ emit(imm8); |
+} |
+ |
+ |
void Assembler::cvttss2si(Register dst, const Operand& src) { |
EnsureSpace ensure_space(this); |
emit(0xF3); |
@@ -2966,6 +3000,16 @@ void Assembler::movmskps(Register dst, XMMRegister src) { |
} |
+void Assembler::pcmpeqd(XMMRegister dst, XMMRegister src) { |
+ EnsureSpace ensure_space(this); |
+ emit(0x66); |
+ emit_optional_rex_32(dst, src); |
+ emit(0x0F); |
+ emit(0x76); |
+ emit_sse_operand(dst, src); |
+} |
+ |
+ |
void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) { |
Register ireg = { reg.code() }; |
emit_operand(ireg, adr); |