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| 1 // Copyright 2010 the V8 project authors. All rights reserved. | 1 // Copyright 2010 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 171 } | 171 } |
| 172 | 172 |
| 173 | 173 |
| 174 void MacroAssembler::Drop(int count, Condition cond) { | 174 void MacroAssembler::Drop(int count, Condition cond) { |
| 175 if (count > 0) { | 175 if (count > 0) { |
| 176 add(sp, sp, Operand(count * kPointerSize), LeaveCC, cond); | 176 add(sp, sp, Operand(count * kPointerSize), LeaveCC, cond); |
| 177 } | 177 } |
| 178 } | 178 } |
| 179 | 179 |
| 180 | 180 |
| 181 void MacroAssembler::Ret(int drop, Condition cond) { |
| 182 Drop(drop, cond); |
| 183 Ret(cond); |
| 184 } |
| 185 |
| 186 |
| 181 void MacroAssembler::Swap(Register reg1, | 187 void MacroAssembler::Swap(Register reg1, |
| 182 Register reg2, | 188 Register reg2, |
| 183 Register scratch, | 189 Register scratch, |
| 184 Condition cond) { | 190 Condition cond) { |
| 185 if (scratch.is(no_reg)) { | 191 if (scratch.is(no_reg)) { |
| 186 eor(reg1, reg1, Operand(reg2), LeaveCC, cond); | 192 eor(reg1, reg1, Operand(reg2), LeaveCC, cond); |
| 187 eor(reg2, reg2, Operand(reg1), LeaveCC, cond); | 193 eor(reg2, reg2, Operand(reg1), LeaveCC, cond); |
| 188 eor(reg1, reg1, Operand(reg2), LeaveCC, cond); | 194 eor(reg1, reg1, Operand(reg2), LeaveCC, cond); |
| 189 } else { | 195 } else { |
| 190 mov(scratch, reg1, LeaveCC, cond); | 196 mov(scratch, reg1, LeaveCC, cond); |
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| 815 // code field in the function to allow recompilation to take effect | 821 // code field in the function to allow recompilation to take effect |
| 816 // without changing any of the call sites. | 822 // without changing any of the call sites. |
| 817 ldr(r3, FieldMemOperand(r1, JSFunction::kCodeEntryOffset)); | 823 ldr(r3, FieldMemOperand(r1, JSFunction::kCodeEntryOffset)); |
| 818 InvokeCode(r3, expected, actual, flag); | 824 InvokeCode(r3, expected, actual, flag); |
| 819 } else { | 825 } else { |
| 820 InvokeCode(code, expected, actual, RelocInfo::CODE_TARGET, flag); | 826 InvokeCode(code, expected, actual, RelocInfo::CODE_TARGET, flag); |
| 821 } | 827 } |
| 822 } | 828 } |
| 823 | 829 |
| 824 | 830 |
| 831 void MacroAssembler::IsObjectJSObjectType(Register heap_object, |
| 832 Register map, |
| 833 Register scratch, |
| 834 Label* fail) { |
| 835 ldr(map, FieldMemOperand(heap_object, HeapObject::kMapOffset)); |
| 836 IsInstanceJSObjectType(map, scratch, fail); |
| 837 } |
| 838 |
| 839 |
| 840 void MacroAssembler::IsInstanceJSObjectType(Register map, |
| 841 Register scratch, |
| 842 Label* fail) { |
| 843 ldrb(scratch, FieldMemOperand(map, Map::kInstanceTypeOffset)); |
| 844 cmp(scratch, Operand(FIRST_JS_OBJECT_TYPE)); |
| 845 b(lt, fail); |
| 846 cmp(scratch, Operand(LAST_JS_OBJECT_TYPE)); |
| 847 b(gt, fail); |
| 848 } |
| 849 |
| 850 |
| 851 void MacroAssembler::IsObjectJSStringType(Register object, |
| 852 Register scratch, |
| 853 Label* fail) { |
| 854 ASSERT(kNotStringTag != 0); |
| 855 |
| 856 ldr(scratch, FieldMemOperand(object, HeapObject::kMapOffset)); |
| 857 ldrb(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset)); |
| 858 tst(scratch, Operand(kIsNotStringMask)); |
| 859 b(nz, fail); |
| 860 } |
| 861 |
| 862 |
| 825 #ifdef ENABLE_DEBUGGER_SUPPORT | 863 #ifdef ENABLE_DEBUGGER_SUPPORT |
| 826 void MacroAssembler::DebugBreak() { | 864 void MacroAssembler::DebugBreak() { |
| 827 ASSERT(allow_stub_calls()); | 865 ASSERT(allow_stub_calls()); |
| 828 mov(r0, Operand(0, RelocInfo::NONE)); | 866 mov(r0, Operand(0, RelocInfo::NONE)); |
| 829 mov(r1, Operand(ExternalReference(Runtime::kDebugBreak))); | 867 mov(r1, Operand(ExternalReference(Runtime::kDebugBreak))); |
| 830 CEntryStub ces(1); | 868 CEntryStub ces(1); |
| 831 Call(ces.GetCode(), RelocInfo::DEBUG_BREAK); | 869 Call(ces.GetCode(), RelocInfo::DEBUG_BREAK); |
| 832 } | 870 } |
| 833 #endif | 871 #endif |
| 834 | 872 |
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| 1054 if (FLAG_debug_code) { | 1092 if (FLAG_debug_code) { |
| 1055 // Trash the registers to simulate an allocation failure. | 1093 // Trash the registers to simulate an allocation failure. |
| 1056 mov(result, Operand(0x7091)); | 1094 mov(result, Operand(0x7091)); |
| 1057 mov(scratch1, Operand(0x7191)); | 1095 mov(scratch1, Operand(0x7191)); |
| 1058 mov(scratch2, Operand(0x7291)); | 1096 mov(scratch2, Operand(0x7291)); |
| 1059 } | 1097 } |
| 1060 jmp(gc_required); | 1098 jmp(gc_required); |
| 1061 return; | 1099 return; |
| 1062 } | 1100 } |
| 1063 | 1101 |
| 1102 // Assert that the register arguments are different and that none of |
| 1103 // them are ip. ip is used explicitly in the code generated below. |
| 1064 ASSERT(!result.is(scratch1)); | 1104 ASSERT(!result.is(scratch1)); |
| 1065 ASSERT(!result.is(scratch2)); | 1105 ASSERT(!result.is(scratch2)); |
| 1066 ASSERT(!scratch1.is(scratch2)); | 1106 ASSERT(!scratch1.is(scratch2)); |
| 1107 ASSERT(!result.is(ip)); |
| 1108 ASSERT(!scratch1.is(ip)); |
| 1109 ASSERT(!scratch2.is(ip)); |
| 1067 | 1110 |
| 1068 // Check relative positions of allocation top and limit addresses. | 1111 // Check relative positions of allocation top and limit addresses. |
| 1069 // The values must be adjacent in memory to allow the use of LDM. | 1112 // The values must be adjacent in memory to allow the use of LDM. |
| 1070 // Also, assert that the registers are numbered such that the values | 1113 // Also, assert that the registers are numbered such that the values |
| 1071 // are loaded in the correct order. | 1114 // are loaded in the correct order. |
| 1072 ExternalReference new_space_allocation_top = | 1115 ExternalReference new_space_allocation_top = |
| 1073 ExternalReference::new_space_allocation_top_address(); | 1116 ExternalReference::new_space_allocation_top_address(); |
| 1074 ExternalReference new_space_allocation_limit = | 1117 ExternalReference new_space_allocation_limit = |
| 1075 ExternalReference::new_space_allocation_limit_address(); | 1118 ExternalReference::new_space_allocation_limit_address(); |
| 1076 intptr_t top = | 1119 intptr_t top = |
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| 2139 | 2182 |
| 2140 void CodePatcher::Emit(Address addr) { | 2183 void CodePatcher::Emit(Address addr) { |
| 2141 masm()->emit(reinterpret_cast<Instr>(addr)); | 2184 masm()->emit(reinterpret_cast<Instr>(addr)); |
| 2142 } | 2185 } |
| 2143 #endif // ENABLE_DEBUGGER_SUPPORT | 2186 #endif // ENABLE_DEBUGGER_SUPPORT |
| 2144 | 2187 |
| 2145 | 2188 |
| 2146 } } // namespace v8::internal | 2189 } } // namespace v8::internal |
| 2147 | 2190 |
| 2148 #endif // V8_TARGET_ARCH_ARM | 2191 #endif // V8_TARGET_ARCH_ARM |
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