[Isolates] Merge from bleeding_edge to isolates, revisions 6100-6300.

src/ia32/assembler-ia32.cc

Index: src/ia32/assembler-ia32.cc
===================================================================
--- src/ia32/assembler-ia32.cc	(revision 6941)
+++ src/ia32/assembler-ia32.cc	(working copy)
@@ -2465,6 +2465,17 @@
 }
 
 
+void Assembler::por(XMMRegister dst, XMMRegister src) {
+  ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  EMIT(0x66);
+  EMIT(0x0F);
+  EMIT(0xEB);
+  emit_sse_operand(dst, src);
+}
+
+
 void Assembler::ptest(XMMRegister dst, XMMRegister src) {
   ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE4_1));
   EnsureSpace ensure_space(this);
@@ -2489,6 +2500,40 @@
 }
 
 
+void Assembler::psllq(XMMRegister dst, XMMRegister src) {
+  ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  EMIT(0x66);
+  EMIT(0x0F);
+  EMIT(0xF3);
+  emit_sse_operand(dst, src);
+}
+
+
+void Assembler::psrlq(XMMRegister reg, int8_t shift) {
+  ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  EMIT(0x66);
+  EMIT(0x0F);
+  EMIT(0x73);
+  emit_sse_operand(edx, reg);  // edx == 2
+  EMIT(shift);
+}
+
+
+void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
+  ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
+  EnsureSpace ensure_space(this);
+  last_pc_ = pc_;
+  EMIT(0x66);
+  EMIT(0x0F);
+  EMIT(0xD3);
+  emit_sse_operand(dst, src);
+}
+
+
 void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) {
   ASSERT(Isolate::Current()->cpu_features()->IsEnabled(SSE2));
   EnsureSpace ensure_space(this);