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Issue 6577036: [Isolates] Merge from bleeding_edge to isolates, revisions 6100-6300. (Closed) Base URL: http://v8.googlecode.com/svn/branches/experimental/isolates/
Patch Set: '' Created 9 years, 10 months ago
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1 // Copyright 2010 the V8 project authors. All rights reserved. 1 // Copyright 2010 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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2594 ASSERT((instr->Bit(4) == 0) && (instr->Opc1Field() == 0x7)); 2594 ASSERT((instr->Bit(4) == 0) && (instr->Opc1Field() == 0x7));
2595 ASSERT(((instr->Opc2Field() == 0x4) || (instr->Opc2Field() == 0x5)) && 2595 ASSERT(((instr->Opc2Field() == 0x4) || (instr->Opc2Field() == 0x5)) &&
2596 (instr->Opc3Field() & 0x1)); 2596 (instr->Opc3Field() & 0x1));
2597 // Comparison. 2597 // Comparison.
2598 2598
2599 VFPRegPrecision precision = kSinglePrecision; 2599 VFPRegPrecision precision = kSinglePrecision;
2600 if (instr->SzField() == 1) { 2600 if (instr->SzField() == 1) {
2601 precision = kDoublePrecision; 2601 precision = kDoublePrecision;
2602 } 2602 }
2603 2603
2604 if (instr->Bit(7) != 0) {
2605 // Raising exceptions for quiet NaNs are not supported.
2606 UNIMPLEMENTED(); // Not used by V8.
2607 }
2608
2609 int d = instr->VFPDRegCode(precision); 2604 int d = instr->VFPDRegCode(precision);
2610 int m = 0; 2605 int m = 0;
2611 if (instr->Opc2Field() == 0x4) { 2606 if (instr->Opc2Field() == 0x4) {
2612 m = instr->VFPMRegCode(precision); 2607 m = instr->VFPMRegCode(precision);
2613 } 2608 }
2614 2609
2615 if (precision == kDoublePrecision) { 2610 if (precision == kDoublePrecision) {
2616 double dd_value = get_double_from_d_register(d); 2611 double dd_value = get_double_from_d_register(d);
2617 double dm_value = 0.0; 2612 double dm_value = 0.0;
2618 if (instr->Opc2Field() == 0x4) { 2613 if (instr->Opc2Field() == 0x4) {
2619 dm_value = get_double_from_d_register(m); 2614 dm_value = get_double_from_d_register(m);
2620 } 2615 }
2621 2616
2617 // Raise exceptions for quiet NaNs if necessary.
2618 if (instr->Bit(7) == 1) {
2619 if (isnan(dd_value)) {
2620 inv_op_vfp_flag_ = true;
2621 }
2622 }
2623
2622 Compute_FPSCR_Flags(dd_value, dm_value); 2624 Compute_FPSCR_Flags(dd_value, dm_value);
2623 } else { 2625 } else {
2624 UNIMPLEMENTED(); // Not used by V8. 2626 UNIMPLEMENTED(); // Not used by V8.
2625 } 2627 }
2626 } 2628 }
2627 2629
2628 2630
2629 void Simulator::DecodeVCVTBetweenDoubleAndSingle(Instr* instr) { 2631 void Simulator::DecodeVCVTBetweenDoubleAndSingle(Instr* instr) {
2630 ASSERT((instr->Bit(4) == 0) && (instr->Opc1Field() == 0x7)); 2632 ASSERT((instr->Bit(4) == 0) && (instr->Opc1Field() == 0x7));
2631 ASSERT((instr->Opc2Field() == 0x7) && (instr->Opc3Field() == 0x3)); 2633 ASSERT((instr->Opc2Field() == 0x7) && (instr->Opc3Field() == 0x3));
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3045 uintptr_t address = *stack_slot; 3047 uintptr_t address = *stack_slot;
3046 set_register(sp, current_sp + sizeof(uintptr_t)); 3048 set_register(sp, current_sp + sizeof(uintptr_t));
3047 return address; 3049 return address;
3048 } 3050 }
3049 3051
3050 } } // namespace assembler::arm 3052 } } // namespace assembler::arm
3051 3053
3052 #endif // USE_SIMULATOR 3054 #endif // USE_SIMULATOR
3053 3055
3054 #endif // V8_TARGET_ARCH_ARM 3056 #endif // V8_TARGET_ARCH_ARM
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