| Index: src/arm/simulator-arm.cc
|
| diff --git a/src/arm/simulator-arm.cc b/src/arm/simulator-arm.cc
|
| index df067656732c343dad9b31e70b9eee616797bed1..5105f1edb80daa4f964edefc931f881edd17ad41 100644
|
| --- a/src/arm/simulator-arm.cc
|
| +++ b/src/arm/simulator-arm.cc
|
| @@ -2711,19 +2711,6 @@ void Simulator::DecodeType3(Instruction* instr) {
|
| }
|
| case db_x: {
|
| if (instr->Bits(22, 20) == 0x5) {
|
| - if (instr->Bits(7, 4) == 0xd) {
|
| - // SMMLS (in V8 notation matching ARM ISA format)
|
| - // Format(instr, "smmls'cond 'rn, 'rm, 'rs, 'rd");
|
| - int rm = instr->RmValue();
|
| - int32_t rm_val = get_register(rm);
|
| - int rs = instr->RsValue();
|
| - int32_t rs_val = get_register(rs);
|
| - int rd = instr->RdValue();
|
| - int32_t rd_val = get_register(rd);
|
| - rn_val = base::bits::SignedMulHighAndSub32(rm_val, rs_val, rd_val);
|
| - set_register(rn, rn_val);
|
| - return;
|
| - }
|
| if (instr->Bits(7, 4) == 0x1) {
|
| int rm = instr->RmValue();
|
| int32_t rm_val = get_register(rm);
|
|
|