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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <stdarg.h> | 5 #include <stdarg.h> |
| 6 #include <stdlib.h> | 6 #include <stdlib.h> |
| 7 #include <cmath> | 7 #include <cmath> |
| 8 | 8 |
| 9 #include "src/v8.h" | 9 #include "src/v8.h" |
| 10 | 10 |
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| 2704 } | 2704 } |
| 2705 break; | 2705 break; |
| 2706 } | 2706 } |
| 2707 } | 2707 } |
| 2708 return; | 2708 return; |
| 2709 } | 2709 } |
| 2710 break; | 2710 break; |
| 2711 } | 2711 } |
| 2712 case db_x: { | 2712 case db_x: { |
| 2713 if (instr->Bits(22, 20) == 0x5) { | 2713 if (instr->Bits(22, 20) == 0x5) { |
| 2714 if (instr->Bits(7, 4) == 0xd) { | |
| 2715 // SMMLS (in V8 notation matching ARM ISA format) | |
| 2716 // Format(instr, "smmls'cond 'rn, 'rm, 'rs, 'rd"); | |
| 2717 int rm = instr->RmValue(); | |
| 2718 int32_t rm_val = get_register(rm); | |
| 2719 int rs = instr->RsValue(); | |
| 2720 int32_t rs_val = get_register(rs); | |
| 2721 int rd = instr->RdValue(); | |
| 2722 int32_t rd_val = get_register(rd); | |
| 2723 rn_val = base::bits::SignedMulHighAndSub32(rm_val, rs_val, rd_val); | |
| 2724 set_register(rn, rn_val); | |
| 2725 return; | |
| 2726 } | |
| 2727 if (instr->Bits(7, 4) == 0x1) { | 2714 if (instr->Bits(7, 4) == 0x1) { |
| 2728 int rm = instr->RmValue(); | 2715 int rm = instr->RmValue(); |
| 2729 int32_t rm_val = get_register(rm); | 2716 int32_t rm_val = get_register(rm); |
| 2730 int rs = instr->RsValue(); | 2717 int rs = instr->RsValue(); |
| 2731 int32_t rs_val = get_register(rs); | 2718 int32_t rs_val = get_register(rs); |
| 2732 if (instr->Bits(15, 12) == 0xF) { | 2719 if (instr->Bits(15, 12) == 0xF) { |
| 2733 // SMMUL (in V8 notation matching ARM ISA format) | 2720 // SMMUL (in V8 notation matching ARM ISA format) |
| 2734 // Format(instr, "smmul'cond 'rn, 'rm, 'rs"); | 2721 // Format(instr, "smmul'cond 'rn, 'rm, 'rs"); |
| 2735 rn_val = base::bits::SignedMulHigh32(rm_val, rs_val); | 2722 rn_val = base::bits::SignedMulHigh32(rm_val, rs_val); |
| 2736 } else { | 2723 } else { |
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| 3866 uintptr_t address = *stack_slot; | 3853 uintptr_t address = *stack_slot; |
| 3867 set_register(sp, current_sp + sizeof(uintptr_t)); | 3854 set_register(sp, current_sp + sizeof(uintptr_t)); |
| 3868 return address; | 3855 return address; |
| 3869 } | 3856 } |
| 3870 | 3857 |
| 3871 } } // namespace v8::internal | 3858 } } // namespace v8::internal |
| 3872 | 3859 |
| 3873 #endif // USE_SIMULATOR | 3860 #endif // USE_SIMULATOR |
| 3874 | 3861 |
| 3875 #endif // V8_TARGET_ARCH_ARM | 3862 #endif // V8_TARGET_ARCH_ARM |
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