| Index: src/ia32/assembler-ia32.cc
|
| ===================================================================
|
| --- src/ia32/assembler-ia32.cc (revision 6800)
|
| +++ src/ia32/assembler-ia32.cc (working copy)
|
| @@ -2465,6 +2465,17 @@
|
| }
|
|
|
|
|
| +void Assembler::por(XMMRegister dst, XMMRegister src) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0x66);
|
| + EMIT(0x0F);
|
| + EMIT(0xEB);
|
| + emit_sse_operand(dst, src);
|
| +}
|
| +
|
| +
|
| void Assembler::ptest(XMMRegister dst, XMMRegister src) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE4_1));
|
| EnsureSpace ensure_space(this);
|
| @@ -2489,6 +2500,40 @@
|
| }
|
|
|
|
|
| +void Assembler::psllq(XMMRegister dst, XMMRegister src) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0x66);
|
| + EMIT(0x0F);
|
| + EMIT(0xF3);
|
| + emit_sse_operand(dst, src);
|
| +}
|
| +
|
| +
|
| +void Assembler::psrlq(XMMRegister reg, int8_t shift) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0x66);
|
| + EMIT(0x0F);
|
| + EMIT(0x73);
|
| + emit_sse_operand(edx, reg); // edx == 2
|
| + EMIT(shift);
|
| +}
|
| +
|
| +
|
| +void Assembler::psrlq(XMMRegister dst, XMMRegister src) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0x66);
|
| + EMIT(0x0F);
|
| + EMIT(0xD3);
|
| + emit_sse_operand(dst, src);
|
| +}
|
| +
|
| +
|
| void Assembler::pshufd(XMMRegister dst, XMMRegister src, int8_t shuffle) {
|
| ASSERT(CpuFeatures::IsEnabled(SSE2));
|
| EnsureSpace ensure_space(this);
|
| @@ -2514,6 +2559,19 @@
|
| }
|
|
|
|
|
| +void Assembler::pinsrd(XMMRegister dst, const Operand& src, int8_t offset) {
|
| + ASSERT(CpuFeatures::IsEnabled(SSE4_1));
|
| + EnsureSpace ensure_space(this);
|
| + last_pc_ = pc_;
|
| + EMIT(0x66);
|
| + EMIT(0x0F);
|
| + EMIT(0x3A);
|
| + EMIT(0x22);
|
| + emit_sse_operand(dst, src);
|
| + EMIT(offset);
|
| +}
|
| +
|
| +
|
| void Assembler::emit_sse_operand(XMMRegister reg, const Operand& adr) {
|
| Register ireg = { reg.code() };
|
| emit_operand(ireg, adr);
|
| @@ -2549,8 +2607,8 @@
|
| }
|
|
|
|
|
| -void Assembler::RecordComment(const char* msg) {
|
| - if (FLAG_code_comments) {
|
| +void Assembler::RecordComment(const char* msg, bool force) {
|
| + if (FLAG_code_comments || force) {
|
| EnsureSpace ensure_space(this);
|
| RecordRelocInfo(RelocInfo::COMMENT, reinterpret_cast<intptr_t>(msg));
|
| }
|
|
|