| Index: src/x64/disasm-x64.cc
|
| ===================================================================
|
| --- src/x64/disasm-x64.cc (revision 6800)
|
| +++ src/x64/disasm-x64.cc (working copy)
|
| @@ -1025,11 +1025,19 @@
|
| rex_w() ? 'q' : 'd',
|
| NameOfXMMRegister(regop));
|
| current += PrintRightOperand(current);
|
| + } else if (opcode == 0x6F) {
|
| + AppendToBuffer("movdqa %s,",
|
| + NameOfXMMRegister(regop));
|
| + current += PrintRightOperand(current);
|
| } else if (opcode == 0x7E) {
|
| AppendToBuffer("mov%c ",
|
| rex_w() ? 'q' : 'd');
|
| current += PrintRightOperand(current);
|
| AppendToBuffer(", %s", NameOfXMMRegister(regop));
|
| + } else if (opcode == 0x7F) {
|
| + AppendToBuffer("movdqa ");
|
| + current += PrintRightOperand(current);
|
| + AppendToBuffer(", %s", NameOfXMMRegister(regop));
|
| } else {
|
| const char* mnemonic = "?";
|
| if (opcode == 0x57) {
|
| @@ -1038,6 +1046,8 @@
|
| mnemonic = "ucomisd";
|
| } else if (opcode == 0x2F) {
|
| mnemonic = "comisd";
|
| + } else if (opcode == 0x50) {
|
| + mnemonic = "movmskpd";
|
| } else {
|
| UnimplementedInstruction();
|
| }
|
| @@ -1113,9 +1123,11 @@
|
| } else if (opcode == 0x2C) {
|
| // CVTTSS2SI:
|
| // Convert with truncation scalar single-precision FP to dword integer.
|
| - // Assert that mod is not 3, so source is memory, not an XMM register.
|
| - ASSERT_NE(0xC0, *current & 0xC0);
|
| - current += PrintOperands("cvttss2si", REG_OPER_OP_ORDER, current);
|
| + int mod, regop, rm;
|
| + get_modrm(*current, &mod, ®op, &rm);
|
| + AppendToBuffer("cvttss2si%c %s,",
|
| + operand_size_code(), NameOfCPURegister(regop));
|
| + current += PrintRightXMMOperand(current);
|
| } else if (opcode == 0x5A) {
|
| // CVTSS2SD:
|
| // Convert scalar single-precision FP to scalar double-precision FP.
|
|
|