Subzero: Improve performance of liveness analysis and live range construction.

tests_lit/llvm2ice_tests/64bit.pnacl.ll

Index: tests_lit/llvm2ice_tests/64bit.pnacl.ll
diff --git a/tests_lit/llvm2ice_tests/64bit.pnacl.ll b/tests_lit/llvm2ice_tests/64bit.pnacl.ll
index cd6cdbac4e1c3905f0760b40dc2bb83d147d72de..0ba403cbebe1d43b697a1deba5b03401ba68c91a 100644
--- a/tests_lit/llvm2ice_tests/64bit.pnacl.ll
+++ b/tests_lit/llvm2ice_tests/64bit.pnacl.ll
@@ -317,6 +317,24 @@ entry:
 ; OPTM1: test {{.*}}, 32
 ; OPTM1: je
 
+define internal i32 @shl64BitSignedTrunc(i64 %a, i64 %b) {
+entry:
+  %shl = shl i64 %a, %b
+  %result = trunc i64 %shl to i32
+  ret i32 %result
+}
+; CHECK-LABEL: shl64BitSignedTrunc
+; CHECK: mov
+; CHECK: shl e
+; CHECK: test {{.*}}, 32
+; CHECK: je
+;
+; OPTM1-LABEL: shl64BitSignedTrunc
+; OPTM1: shld
+; OPTM1: shl e
+; OPTM1: test {{.*}}, 32
+; OPTM1: je
+
 define internal i64 @shl64BitUnsigned(i64 %a, i64 %b) {
 entry:
   %shl = shl i64 %a, %b
@@ -353,6 +371,25 @@ entry:
 ; OPTM1: je
 ; OPTM1: sar {{.*}}, 31
 
+define internal i32 @shr64BitSignedTrunc(i64 %a, i64 %b) {
+entry:
+  %shr = ashr i64 %a, %b
+  %result = trunc i64 %shr to i32
+  ret i32 %result
+}
+; CHECK-LABEL: shr64BitSignedTrunc
+; CHECK: shrd
+; CHECK: sar
+; CHECK: test {{.*}}, 32
+; CHECK: je
+;
+; OPTM1-LABEL: shr64BitSignedTrunc
+; OPTM1: shrd
+; OPTM1: sar
+; OPTM1: test {{.*}}, 32
+; OPTM1: je
+; OPTM1: sar {{.*}}, 31

[jvoung (off chromium), 2014/10/13 20:50:50]

could the CHECK also check sar ..., 31 to be consistent with the OPTM1: ?

[Jim Stichnoth, 2014/10/13 23:15:22]

No - with O2 (liveness analysis + DCE), the result of the latter sar instruction
is unused and therefore the sar is eliminated.  It would be nice if I could
specify that no sar instruction may appear before the end of the function
(without the hassle of a separate RUN line and prefix).

This is similar to the shl test where the O2 version should not use shld.

+
 define internal i64 @shr64BitUnsigned(i64 %a, i64 %b) {
 entry:
   %shr = lshr i64 %a, %b
@@ -370,6 +407,24 @@ entry:
 ; OPTM1: test {{.*}}, 32
 ; OPTM1: je
 
+define internal i32 @shr64BitUnsignedTrunc(i64 %a, i64 %b) {
+entry:
+  %shr = lshr i64 %a, %b
+  %result = trunc i64 %shr to i32
+  ret i32 %result
+}
+; CHECK-LABEL: shr64BitUnsignedTrunc
+; CHECK: shrd
+; CHECK: shr
+; CHECK: test {{.*}}, 32
+; CHECK: je
+;
+; OPTM1-LABEL: shr64BitUnsignedTrunc
+; OPTM1: shrd
+; OPTM1: shr
+; OPTM1: test {{.*}}, 32
+; OPTM1: je
+
 define internal i64 @and64BitSigned(i64 %a, i64 %b) {
 entry:
   %and = and i64 %b, %a