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Side by Side Diff: src/IceTargetLoweringX8632.cpp

Issue 652633002: Subzero: Improve performance of liveness analysis and live range construction. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Remove TODO Created 6 years, 2 months ago
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1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===// 1 //===- subzero/src/IceTargetLoweringX8632.cpp - x86-32 lowering -----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file implements the TargetLoweringX8632 class, which 10 // This file implements the TargetLoweringX8632 class, which
(...skipping 435 matching lines...) Expand 10 before | Expand all | Expand 10 after
446 446
447 Variable *TargetX8632::getPhysicalRegister(SizeT RegNum) { 447 Variable *TargetX8632::getPhysicalRegister(SizeT RegNum) {
448 assert(RegNum < PhysicalRegisters.size()); 448 assert(RegNum < PhysicalRegisters.size());
449 Variable *Reg = PhysicalRegisters[RegNum]; 449 Variable *Reg = PhysicalRegisters[RegNum];
450 if (Reg == NULL) { 450 if (Reg == NULL) {
451 Reg = Func->makeVariable(IceType_i32); 451 Reg = Func->makeVariable(IceType_i32);
452 Reg->setRegNum(RegNum); 452 Reg->setRegNum(RegNum);
453 PhysicalRegisters[RegNum] = Reg; 453 PhysicalRegisters[RegNum] = Reg;
454 // Specially mark esp as an "argument" so that it is considered 454 // Specially mark esp as an "argument" so that it is considered
455 // live upon function entry. 455 // live upon function entry.
456 if (RegNum == RegX8632::Reg_esp) 456 if (RegNum == RegX8632::Reg_esp) {
457 Func->addImplicitArg(Reg); 457 Func->addImplicitArg(Reg);
458 Reg->setIgnoreLiveness();
459 }
458 } 460 }
459 return Reg; 461 return Reg;
460 } 462 }
461 463
462 IceString TargetX8632::getRegName(SizeT RegNum, Type Ty) const { 464 IceString TargetX8632::getRegName(SizeT RegNum, Type Ty) const {
463 assert(RegNum < RegX8632::Reg_NUM); 465 assert(RegNum < RegX8632::Reg_NUM);
464 static IceString RegNames8[] = { 466 static IceString RegNames8[] = {
465 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \ 467 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \
466 frameptr, isI8, isInt, isFP) \ 468 frameptr, isI8, isInt, isFP) \
467 name8, 469 name8,
(...skipping 782 matching lines...) Expand 10 before | Expand all | Expand 10 after
1250 Constant *BitTest = Ctx->getConstantInt32(IceType_i32, 0x20); 1252 Constant *BitTest = Ctx->getConstantInt32(IceType_i32, 0x20);
1251 Constant *Zero = Ctx->getConstantZero(IceType_i32); 1253 Constant *Zero = Ctx->getConstantZero(IceType_i32);
1252 InstX8632Label *Label = InstX8632Label::create(Func, this); 1254 InstX8632Label *Label = InstX8632Label::create(Func, this);
1253 _mov(T_1, Src1Lo, RegX8632::Reg_ecx); 1255 _mov(T_1, Src1Lo, RegX8632::Reg_ecx);
1254 _mov(T_2, Src0Lo); 1256 _mov(T_2, Src0Lo);
1255 _mov(T_3, Src0Hi); 1257 _mov(T_3, Src0Hi);
1256 _shld(T_3, T_2, T_1); 1258 _shld(T_3, T_2, T_1);
1257 _shl(T_2, T_1); 1259 _shl(T_2, T_1);
1258 _test(T_1, BitTest); 1260 _test(T_1, BitTest);
1259 _br(CondX86::Br_e, Label); 1261 _br(CondX86::Br_e, Label);
1260 // Because of the intra-block control flow, we need to fake a use 1262 // T_2 and T_3 are being assigned again because of the
1261 // of T_3 to prevent its earlier definition from being dead-code 1263 // intra-block control flow, so we need the _mov_nonkillable
1262 // eliminated in the presence of its later definition. 1264 // variant to avoid liveness problems.
1263 Context.insert(InstFakeUse::create(Func, T_3)); 1265 _mov_nonkillable(T_3, T_2);
1264 _mov(T_3, T_2); 1266 _mov_nonkillable(T_2, Zero);
1265 _mov(T_2, Zero);
1266 Context.insert(Label); 1267 Context.insert(Label);
1267 _mov(DestLo, T_2); 1268 _mov(DestLo, T_2);
1268 _mov(DestHi, T_3); 1269 _mov(DestHi, T_3);
1269 } break; 1270 } break;
1270 case InstArithmetic::Lshr: { 1271 case InstArithmetic::Lshr: {
1271 // a=b>>c (unsigned) ==> 1272 // a=b>>c (unsigned) ==>
1272 // t1:ecx = c.lo & 0xff 1273 // t1:ecx = c.lo & 0xff
1273 // t2 = b.lo 1274 // t2 = b.lo
1274 // t3 = b.hi 1275 // t3 = b.hi
1275 // t2 = shrd t2, t3, t1 1276 // t2 = shrd t2, t3, t1
(...skipping 10 matching lines...) Expand all
1286 Constant *BitTest = Ctx->getConstantInt32(IceType_i32, 0x20); 1287 Constant *BitTest = Ctx->getConstantInt32(IceType_i32, 0x20);
1287 Constant *Zero = Ctx->getConstantZero(IceType_i32); 1288 Constant *Zero = Ctx->getConstantZero(IceType_i32);
1288 InstX8632Label *Label = InstX8632Label::create(Func, this); 1289 InstX8632Label *Label = InstX8632Label::create(Func, this);
1289 _mov(T_1, Src1Lo, RegX8632::Reg_ecx); 1290 _mov(T_1, Src1Lo, RegX8632::Reg_ecx);
1290 _mov(T_2, Src0Lo); 1291 _mov(T_2, Src0Lo);
1291 _mov(T_3, Src0Hi); 1292 _mov(T_3, Src0Hi);
1292 _shrd(T_2, T_3, T_1); 1293 _shrd(T_2, T_3, T_1);
1293 _shr(T_3, T_1); 1294 _shr(T_3, T_1);
1294 _test(T_1, BitTest); 1295 _test(T_1, BitTest);
1295 _br(CondX86::Br_e, Label); 1296 _br(CondX86::Br_e, Label);
1296 // Because of the intra-block control flow, we need to fake a use 1297 // T_2 and T_3 are being assigned again because of the
1297 // of T_3 to prevent its earlier definition from being dead-code 1298 // intra-block control flow, so we need the _mov_nonkillable
1298 // eliminated in the presence of its later definition. 1299 // variant to avoid liveness problems.
1299 Context.insert(InstFakeUse::create(Func, T_2)); 1300 _mov_nonkillable(T_2, T_3);
1300 _mov(T_2, T_3); 1301 _mov_nonkillable(T_3, Zero);
1301 _mov(T_3, Zero);
1302 Context.insert(Label); 1302 Context.insert(Label);
1303 _mov(DestLo, T_2); 1303 _mov(DestLo, T_2);
1304 _mov(DestHi, T_3); 1304 _mov(DestHi, T_3);
1305 } break; 1305 } break;
1306 case InstArithmetic::Ashr: { 1306 case InstArithmetic::Ashr: {
1307 // a=b>>c (signed) ==> 1307 // a=b>>c (signed) ==>
1308 // t1:ecx = c.lo & 0xff 1308 // t1:ecx = c.lo & 0xff
1309 // t2 = b.lo 1309 // t2 = b.lo
1310 // t3 = b.hi 1310 // t3 = b.hi
1311 // t2 = shrd t2, t3, t1 1311 // t2 = shrd t2, t3, t1
(...skipping 10 matching lines...) Expand all
1322 Constant *BitTest = Ctx->getConstantInt32(IceType_i32, 0x20); 1322 Constant *BitTest = Ctx->getConstantInt32(IceType_i32, 0x20);
1323 Constant *SignExtend = Ctx->getConstantInt32(IceType_i32, 0x1f); 1323 Constant *SignExtend = Ctx->getConstantInt32(IceType_i32, 0x1f);
1324 InstX8632Label *Label = InstX8632Label::create(Func, this); 1324 InstX8632Label *Label = InstX8632Label::create(Func, this);
1325 _mov(T_1, Src1Lo, RegX8632::Reg_ecx); 1325 _mov(T_1, Src1Lo, RegX8632::Reg_ecx);
1326 _mov(T_2, Src0Lo); 1326 _mov(T_2, Src0Lo);
1327 _mov(T_3, Src0Hi); 1327 _mov(T_3, Src0Hi);
1328 _shrd(T_2, T_3, T_1); 1328 _shrd(T_2, T_3, T_1);
1329 _sar(T_3, T_1); 1329 _sar(T_3, T_1);
1330 _test(T_1, BitTest); 1330 _test(T_1, BitTest);
1331 _br(CondX86::Br_e, Label); 1331 _br(CondX86::Br_e, Label);
1332 // Because of the intra-block control flow, we need to fake a use 1332 // T_2 and T_3 are being assigned again because of the
1333 // of T_3 to prevent its earlier definition from being dead-code 1333 // intra-block control flow, so T_2 needs the _mov_nonkillable
1334 // eliminated in the presence of its later definition. 1334 // variant to avoid liveness problems. T_3 doesn't need special
1335 Context.insert(InstFakeUse::create(Func, T_2)); 1335 // treatment because it is reassigned via _sar instead of _mov.
1336 _mov(T_2, T_3); 1336 _mov_nonkillable(T_2, T_3);
1337 _sar(T_3, SignExtend); 1337 _sar(T_3, SignExtend);
1338 Context.insert(Label); 1338 Context.insert(Label);
1339 _mov(DestLo, T_2); 1339 _mov(DestLo, T_2);
1340 _mov(DestHi, T_3); 1340 _mov(DestHi, T_3);
1341 } break; 1341 } break;
1342 case InstArithmetic::Udiv: { 1342 case InstArithmetic::Udiv: {
1343 const SizeT MaxSrcs = 2; 1343 const SizeT MaxSrcs = 2;
1344 InstCall *Call = makeHelperCall("__udivdi3", Dest, MaxSrcs); 1344 InstCall *Call = makeHelperCall("__udivdi3", Dest, MaxSrcs);
1345 Call->addArg(Inst->getSrc(0)); 1345 Call->addArg(Inst->getSrc(0));
1346 Call->addArg(Inst->getSrc(1)); 1346 Call->addArg(Inst->getSrc(1));
(...skipping 1162 matching lines...) Expand 10 before | Expand all | Expand 10 after
2509 } 2509 }
2510 Constant *Default = 2510 Constant *Default =
2511 Ctx->getConstantInt32(IceType_i32, TableFcmp[Index].Default); 2511 Ctx->getConstantInt32(IceType_i32, TableFcmp[Index].Default);
2512 _mov(Dest, Default); 2512 _mov(Dest, Default);
2513 if (HasC1) { 2513 if (HasC1) {
2514 InstX8632Label *Label = InstX8632Label::create(Func, this); 2514 InstX8632Label *Label = InstX8632Label::create(Func, this);
2515 _br(TableFcmp[Index].C1, Label); 2515 _br(TableFcmp[Index].C1, Label);
2516 if (HasC2) { 2516 if (HasC2) {
2517 _br(TableFcmp[Index].C2, Label); 2517 _br(TableFcmp[Index].C2, Label);
2518 } 2518 }
2519 Context.insert(InstFakeUse::create(Func, Dest));
2520 Constant *NonDefault = 2519 Constant *NonDefault =
2521 Ctx->getConstantInt32(IceType_i32, !TableFcmp[Index].Default); 2520 Ctx->getConstantInt32(IceType_i32, !TableFcmp[Index].Default);
2522 _mov(Dest, NonDefault); 2521 _mov_nonkillable(Dest, NonDefault);
2523 Context.insert(Label); 2522 Context.insert(Label);
2524 } 2523 }
2525 } 2524 }
2526 2525
2527 void TargetX8632::lowerIcmp(const InstIcmp *Inst) { 2526 void TargetX8632::lowerIcmp(const InstIcmp *Inst) {
2528 Operand *Src0 = legalize(Inst->getSrc(0)); 2527 Operand *Src0 = legalize(Inst->getSrc(0));
2529 Operand *Src1 = legalize(Inst->getSrc(1)); 2528 Operand *Src1 = legalize(Inst->getSrc(1));
2530 Variable *Dest = Inst->getDest(); 2529 Variable *Dest = Inst->getDest();
2531 2530
2532 if (isVectorType(Dest->getType())) { 2531 if (isVectorType(Dest->getType())) {
(...skipping 135 matching lines...) Expand 10 before | Expand all | Expand 10 after
2668 Operand *Src0HiRM = legalize(hiOperand(Src0), Legal_Reg | Legal_Mem); 2667 Operand *Src0HiRM = legalize(hiOperand(Src0), Legal_Reg | Legal_Mem);
2669 Operand *Src1LoRI = legalize(loOperand(Src1), Legal_Reg | Legal_Imm); 2668 Operand *Src1LoRI = legalize(loOperand(Src1), Legal_Reg | Legal_Imm);
2670 Operand *Src1HiRI = legalize(hiOperand(Src1), Legal_Reg | Legal_Imm); 2669 Operand *Src1HiRI = legalize(hiOperand(Src1), Legal_Reg | Legal_Imm);
2671 if (Condition == InstIcmp::Eq || Condition == InstIcmp::Ne) { 2670 if (Condition == InstIcmp::Eq || Condition == InstIcmp::Ne) {
2672 InstX8632Label *Label = InstX8632Label::create(Func, this); 2671 InstX8632Label *Label = InstX8632Label::create(Func, this);
2673 _mov(Dest, (Condition == InstIcmp::Eq ? Zero : One)); 2672 _mov(Dest, (Condition == InstIcmp::Eq ? Zero : One));
2674 _cmp(Src0LoRM, Src1LoRI); 2673 _cmp(Src0LoRM, Src1LoRI);
2675 _br(CondX86::Br_ne, Label); 2674 _br(CondX86::Br_ne, Label);
2676 _cmp(Src0HiRM, Src1HiRI); 2675 _cmp(Src0HiRM, Src1HiRI);
2677 _br(CondX86::Br_ne, Label); 2676 _br(CondX86::Br_ne, Label);
2678 Context.insert(InstFakeUse::create(Func, Dest)); 2677 _mov_nonkillable(Dest, (Condition == InstIcmp::Eq ? One : Zero));
2679 _mov(Dest, (Condition == InstIcmp::Eq ? One : Zero));
2680 Context.insert(Label); 2678 Context.insert(Label);
2681 } else { 2679 } else {
2682 InstX8632Label *LabelFalse = InstX8632Label::create(Func, this); 2680 InstX8632Label *LabelFalse = InstX8632Label::create(Func, this);
2683 InstX8632Label *LabelTrue = InstX8632Label::create(Func, this); 2681 InstX8632Label *LabelTrue = InstX8632Label::create(Func, this);
2684 _mov(Dest, One); 2682 _mov(Dest, One);
2685 _cmp(Src0HiRM, Src1HiRI); 2683 _cmp(Src0HiRM, Src1HiRI);
2686 _br(TableIcmp64[Index].C1, LabelTrue); 2684 _br(TableIcmp64[Index].C1, LabelTrue);
2687 _br(TableIcmp64[Index].C2, LabelFalse); 2685 _br(TableIcmp64[Index].C2, LabelFalse);
2688 _cmp(Src0LoRM, Src1LoRI); 2686 _cmp(Src0LoRM, Src1LoRI);
2689 _br(TableIcmp64[Index].C3, LabelTrue); 2687 _br(TableIcmp64[Index].C3, LabelTrue);
2690 Context.insert(LabelFalse); 2688 Context.insert(LabelFalse);
2691 Context.insert(InstFakeUse::create(Func, Dest)); 2689 _mov_nonkillable(Dest, Zero);
2692 _mov(Dest, Zero);
2693 Context.insert(LabelTrue); 2690 Context.insert(LabelTrue);
2694 } 2691 }
2695 return; 2692 return;
2696 } 2693 }
2697 2694
2698 // cmp b, c 2695 // cmp b, c
2699 Operand *Src0RM = 2696 Operand *Src0RM =
2700 legalize(Src0, IsSrc1ImmOrReg ? (Legal_Reg | Legal_Mem) : Legal_Reg); 2697 legalize(Src0, IsSrc1ImmOrReg ? (Legal_Reg | Legal_Mem) : Legal_Reg);
2701 InstX8632Label *Label = InstX8632Label::create(Func, this); 2698 InstX8632Label *Label = InstX8632Label::create(Func, this);
2702 _cmp(Src0RM, Src1); 2699 _cmp(Src0RM, Src1);
2703 _mov(Dest, One); 2700 _mov(Dest, One);
2704 _br(getIcmp32Mapping(Inst->getCondition()), Label); 2701 _br(getIcmp32Mapping(Inst->getCondition()), Label);
2705 Context.insert(InstFakeUse::create(Func, Dest)); 2702 _mov_nonkillable(Dest, Zero);
2706 _mov(Dest, Zero);
2707 Context.insert(Label); 2703 Context.insert(Label);
2708 } 2704 }
2709 2705
2710 void TargetX8632::lowerInsertElement(const InstInsertElement *Inst) { 2706 void TargetX8632::lowerInsertElement(const InstInsertElement *Inst) {
2711 Operand *SourceVectNotLegalized = Inst->getSrc(0); 2707 Operand *SourceVectNotLegalized = Inst->getSrc(0);
2712 Operand *ElementToInsertNotLegalized = Inst->getSrc(1); 2708 Operand *ElementToInsertNotLegalized = Inst->getSrc(1);
2713 ConstantInteger32 *ElementIndex = 2709 ConstantInteger32 *ElementIndex =
2714 llvm::dyn_cast<ConstantInteger32>(Inst->getSrc(2)); 2710 llvm::dyn_cast<ConstantInteger32>(Inst->getSrc(2));
2715 // Only constant indices are allowed in PNaCl IR. 2711 // Only constant indices are allowed in PNaCl IR.
2716 assert(ElementIndex); 2712 assert(ElementIndex);
(...skipping 410 matching lines...) Expand 10 before | Expand all | Expand 10 after
3127 return; 3123 return;
3128 } 3124 }
3129 case Intrinsics::Stacksave: { 3125 case Intrinsics::Stacksave: {
3130 Variable *esp = Func->getTarget()->getPhysicalRegister(RegX8632::Reg_esp); 3126 Variable *esp = Func->getTarget()->getPhysicalRegister(RegX8632::Reg_esp);
3131 Variable *Dest = Instr->getDest(); 3127 Variable *Dest = Instr->getDest();
3132 _mov(Dest, esp); 3128 _mov(Dest, esp);
3133 return; 3129 return;
3134 } 3130 }
3135 case Intrinsics::Stackrestore: { 3131 case Intrinsics::Stackrestore: {
3136 Variable *esp = Func->getTarget()->getPhysicalRegister(RegX8632::Reg_esp); 3132 Variable *esp = Func->getTarget()->getPhysicalRegister(RegX8632::Reg_esp);
3137 _mov(esp, Instr->getArg(0)); 3133 _mov_nonkillable(esp, Instr->getArg(0));
3138 return; 3134 return;
3139 } 3135 }
3140 case Intrinsics::Trap: 3136 case Intrinsics::Trap:
3141 _ud2(); 3137 _ud2();
3142 return; 3138 return;
3143 case Intrinsics::UnknownIntrinsic: 3139 case Intrinsics::UnknownIntrinsic:
3144 Func->setError("Should not be lowering UnknownIntrinsic"); 3140 Func->setError("Should not be lowering UnknownIntrinsic");
3145 return; 3141 return;
3146 } 3142 }
3147 return; 3143 return;
(...skipping 788 matching lines...) Expand 10 before | Expand all | Expand 10 after
3936 3932
3937 if (Dest->getType() == IceType_i64) { 3933 if (Dest->getType() == IceType_i64) {
3938 Variable *DestLo = llvm::cast<Variable>(loOperand(Dest)); 3934 Variable *DestLo = llvm::cast<Variable>(loOperand(Dest));
3939 Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest)); 3935 Variable *DestHi = llvm::cast<Variable>(hiOperand(Dest));
3940 Operand *SrcLoRI = legalize(loOperand(SrcT), Legal_Reg | Legal_Imm); 3936 Operand *SrcLoRI = legalize(loOperand(SrcT), Legal_Reg | Legal_Imm);
3941 Operand *SrcHiRI = legalize(hiOperand(SrcT), Legal_Reg | Legal_Imm); 3937 Operand *SrcHiRI = legalize(hiOperand(SrcT), Legal_Reg | Legal_Imm);
3942 _cmp(ConditionRM, Zero); 3938 _cmp(ConditionRM, Zero);
3943 _mov(DestLo, SrcLoRI); 3939 _mov(DestLo, SrcLoRI);
3944 _mov(DestHi, SrcHiRI); 3940 _mov(DestHi, SrcHiRI);
3945 _br(CondX86::Br_ne, Label); 3941 _br(CondX86::Br_ne, Label);
3946 Context.insert(InstFakeUse::create(Func, DestLo));
3947 Context.insert(InstFakeUse::create(Func, DestHi));
3948 Operand *SrcFLo = loOperand(SrcF); 3942 Operand *SrcFLo = loOperand(SrcF);
3949 Operand *SrcFHi = hiOperand(SrcF); 3943 Operand *SrcFHi = hiOperand(SrcF);
3950 SrcLoRI = legalize(SrcFLo, Legal_Reg | Legal_Imm); 3944 SrcLoRI = legalize(SrcFLo, Legal_Reg | Legal_Imm);
3951 SrcHiRI = legalize(SrcFHi, Legal_Reg | Legal_Imm); 3945 SrcHiRI = legalize(SrcFHi, Legal_Reg | Legal_Imm);
3952 _mov(DestLo, SrcLoRI); 3946 _mov_nonkillable(DestLo, SrcLoRI);
3953 _mov(DestHi, SrcHiRI); 3947 _mov_nonkillable(DestHi, SrcHiRI);
3954 } else { 3948 } else {
3955 _cmp(ConditionRM, Zero); 3949 _cmp(ConditionRM, Zero);
3956 SrcT = legalize(SrcT, Legal_Reg | Legal_Imm); 3950 SrcT = legalize(SrcT, Legal_Reg | Legal_Imm);
3957 _mov(Dest, SrcT); 3951 _mov(Dest, SrcT);
3958 _br(CondX86::Br_ne, Label); 3952 _br(CondX86::Br_ne, Label);
3959 Context.insert(InstFakeUse::create(Func, Dest));
3960 SrcF = legalize(SrcF, Legal_Reg | Legal_Imm); 3953 SrcF = legalize(SrcF, Legal_Reg | Legal_Imm);
3961 _mov(Dest, SrcF); 3954 _mov_nonkillable(Dest, SrcF);
3962 } 3955 }
3963 3956
3964 Context.insert(Label); 3957 Context.insert(Label);
3965 } 3958 }
3966 3959
3967 void TargetX8632::lowerStore(const InstStore *Inst) { 3960 void TargetX8632::lowerStore(const InstStore *Inst) {
3968 Operand *Value = Inst->getData(); 3961 Operand *Value = Inst->getData();
3969 Operand *Addr = Inst->getAddr(); 3962 Operand *Addr = Inst->getAddr();
3970 OperandX8632Mem *NewAddr = FormMemoryOperand(Addr, Value->getType()); 3963 OperandX8632Mem *NewAddr = FormMemoryOperand(Addr, Value->getType());
3971 Type Ty = NewAddr->getType(); 3964 Type Ty = NewAddr->getType();
(...skipping 320 matching lines...) Expand 10 before | Expand all | Expand 10 after
4292 assert(Type != IceType_i64); 4285 assert(Type != IceType_i64);
4293 Variable *Reg = Func->makeVariable(Type); 4286 Variable *Reg = Func->makeVariable(Type);
4294 if (RegNum == Variable::NoRegister) 4287 if (RegNum == Variable::NoRegister)
4295 Reg->setWeightInfinite(); 4288 Reg->setWeightInfinite();
4296 else 4289 else
4297 Reg->setRegNum(RegNum); 4290 Reg->setRegNum(RegNum);
4298 return Reg; 4291 return Reg;
4299 } 4292 }
4300 4293
4301 void TargetX8632::postLower() { 4294 void TargetX8632::postLower() {
4302 if (Ctx->getOptLevel() != Opt_m1) 4295 if (Ctx->getOptLevel() != Opt_m1) {
4296 // Find two-address non-SSA instructions where Dest==Src0, and set
4297 // the DestNonKillable flag to keep liveness analysis consistent.
4298 for (Inst *Inst : Context) {
4299 if (Inst->isDeleted())
4300 continue;
4301 if (Variable *Dest = Inst->getDest()) {
4302 // TODO(stichnot): We may need to consider all source
4303 // operands, not just the first one, if using 3-address
4304 // instructions.
4305 if (Inst->getSrcSize() > 0 && Inst->getSrc(0) == Dest)
4306 Inst->setDestNonKillable();
4307 }
4308 }
4303 return; 4309 return;
4304 TimerMarker T(TimerStack::TT_postLower, Func); 4310 }
4305 // TODO: Avoid recomputing WhiteList every instruction. 4311 // TODO: Avoid recomputing WhiteList every instruction.
4306 RegSetMask RegInclude = RegSet_All; 4312 RegSetMask RegInclude = RegSet_All;
4307 RegSetMask RegExclude = RegSet_StackPointer; 4313 RegSetMask RegExclude = RegSet_StackPointer;
4308 if (hasFramePointer()) 4314 if (hasFramePointer())
4309 RegExclude |= RegSet_FramePointer; 4315 RegExclude |= RegSet_FramePointer;
4310 llvm::SmallBitVector WhiteList = getRegisterSet(RegInclude, RegExclude); 4316 llvm::SmallBitVector WhiteList = getRegisterSet(RegInclude, RegExclude);
4311 // Make one pass to black-list pre-colored registers. TODO: If 4317 // Make one pass to black-list pre-colored registers. TODO: If
4312 // there was some prior register allocation pass that made register 4318 // there was some prior register allocation pass that made register
4313 // assignments, those registers need to be black-listed here as 4319 // assignments, those registers need to be black-listed here as
4314 // well. 4320 // well.
(...skipping 196 matching lines...) Expand 10 before | Expand all | Expand 10 after
4511 } else if (IsConstant || IsExternal) 4517 } else if (IsConstant || IsExternal)
4512 Str << "\t.zero\t" << Size << "\n"; 4518 Str << "\t.zero\t" << Size << "\n";
4513 // Size is part of .comm. 4519 // Size is part of .comm.
4514 4520
4515 if (IsConstant || HasInitializer || IsExternal) 4521 if (IsConstant || HasInitializer || IsExternal)
4516 Str << "\t.size\t" << MangledName << ", " << Size << "\n"; 4522 Str << "\t.size\t" << MangledName << ", " << Size << "\n";
4517 // Size is part of .comm. 4523 // Size is part of .comm.
4518 } 4524 }
4519 4525
4520 } // end of namespace Ice 4526 } // end of namespace Ice
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