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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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81 // Addressing modes represent the "shape" of inputs to an instruction. | 81 // Addressing modes represent the "shape" of inputs to an instruction. |
82 // Many instructions support multiple addressing modes. Addressing modes | 82 // Many instructions support multiple addressing modes. Addressing modes |
83 // are encoded into the InstructionCode of the instruction and tell the | 83 // are encoded into the InstructionCode of the instruction and tell the |
84 // code generator after register allocation which assembler method to call. | 84 // code generator after register allocation which assembler method to call. |
85 // | 85 // |
86 // We use the following local notation for addressing modes: | 86 // We use the following local notation for addressing modes: |
87 // | 87 // |
88 // M = memory operand | 88 // M = memory operand |
89 // R = base register | 89 // R = base register |
90 // N = index register * N for N in {1, 2, 4, 8} | 90 // N = index register * N for N in {1, 2, 4, 8} |
91 // I = immediate displacement (int32_t) | 91 // I = immediate displacement (32-bit signed integer) |
92 | 92 |
93 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 93 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
94 V(MR) /* [%r1 ] */ \ | 94 V(MR) /* [%r1 ] */ \ |
95 V(MRI) /* [%r1 + K] */ \ | 95 V(MRI) /* [%r1 + K] */ \ |
96 V(MR1) /* [%r1 + %r2*1 ] */ \ | 96 V(MR1) /* [%r1 + %r2*1 ] */ \ |
97 V(MR2) /* [%r1 + %r2*2 ] */ \ | 97 V(MR2) /* [%r1 + %r2*2 ] */ \ |
98 V(MR4) /* [%r1 + %r2*4 ] */ \ | 98 V(MR4) /* [%r1 + %r2*4 ] */ \ |
99 V(MR8) /* [%r1 + %r2*8 ] */ \ | 99 V(MR8) /* [%r1 + %r2*8 ] */ \ |
100 V(MR1I) /* [%r1 + %r2*1 + K] */ \ | 100 V(MR1I) /* [%r1 + %r2*1 + K] */ \ |
101 V(MR2I) /* [%r1 + %r2*2 + K] */ \ | 101 V(MR2I) /* [%r1 + %r2*2 + K] */ \ |
102 V(MR4I) /* [%r1 + %r2*3 + K] */ \ | 102 V(MR4I) /* [%r1 + %r2*3 + K] */ \ |
103 V(MR8I) /* [%r1 + %r2*4 + K] */ \ | 103 V(MR8I) /* [%r1 + %r2*4 + K] */ \ |
104 V(M1) /* [ %r2*1 ] */ \ | 104 V(M1) /* [ %r2*1 ] */ \ |
105 V(M2) /* [ %r2*2 ] */ \ | 105 V(M2) /* [ %r2*2 ] */ \ |
106 V(M4) /* [ %r2*4 ] */ \ | 106 V(M4) /* [ %r2*4 ] */ \ |
107 V(M8) /* [ %r2*8 ] */ \ | 107 V(M8) /* [ %r2*8 ] */ \ |
108 V(M1I) /* [ %r2*1 + K] */ \ | 108 V(M1I) /* [ %r2*1 + K] */ \ |
109 V(M2I) /* [ %r2*2 + K] */ \ | 109 V(M2I) /* [ %r2*2 + K] */ \ |
110 V(M4I) /* [ %r2*4 + K] */ \ | 110 V(M4I) /* [ %r2*4 + K] */ \ |
111 V(M8I) /* [ %r2*8 + K] */ | 111 V(M8I) /* [ %r2*8 + K] */ |
112 | 112 |
113 } // namespace compiler | 113 } // namespace compiler |
114 } // namespace internal | 114 } // namespace internal |
115 } // namespace v8 | 115 } // namespace v8 |
116 | 116 |
117 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 117 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
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