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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
| 6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
| 7 | 7 |
| 8 namespace v8 { | 8 namespace v8 { |
| 9 namespace internal { | 9 namespace internal { |
| 10 namespace compiler { | 10 namespace compiler { |
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| 78 // Addressing modes represent the "shape" of inputs to an instruction. | 78 // Addressing modes represent the "shape" of inputs to an instruction. |
| 79 // Many instructions support multiple addressing modes. Addressing modes | 79 // Many instructions support multiple addressing modes. Addressing modes |
| 80 // are encoded into the InstructionCode of the instruction and tell the | 80 // are encoded into the InstructionCode of the instruction and tell the |
| 81 // code generator after register allocation which assembler method to call. | 81 // code generator after register allocation which assembler method to call. |
| 82 // | 82 // |
| 83 // We use the following local notation for addressing modes: | 83 // We use the following local notation for addressing modes: |
| 84 // | 84 // |
| 85 // M = memory operand | 85 // M = memory operand |
| 86 // R = base register | 86 // R = base register |
| 87 // N = index register * N for N in {1, 2, 4, 8} | 87 // N = index register * N for N in {1, 2, 4, 8} |
| 88 // I = immediate displacement (int32_t) | 88 // I = immediate displacement (32-bit signed integer) |
| 89 | 89 |
| 90 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 90 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
| 91 V(MR) /* [%r1 ] */ \ | 91 V(MR) /* [%r1 ] */ \ |
| 92 V(MRI) /* [%r1 + K] */ \ | 92 V(MRI) /* [%r1 + K] */ \ |
| 93 V(MR1) /* [%r1 + %r2*1 ] */ \ | 93 V(MR1) /* [%r1 + %r2*1 ] */ \ |
| 94 V(MR2) /* [%r1 + %r2*2 ] */ \ | 94 V(MR2) /* [%r1 + %r2*2 ] */ \ |
| 95 V(MR4) /* [%r1 + %r2*4 ] */ \ | 95 V(MR4) /* [%r1 + %r2*4 ] */ \ |
| 96 V(MR8) /* [%r1 + %r2*8 ] */ \ | 96 V(MR8) /* [%r1 + %r2*8 ] */ \ |
| 97 V(MR1I) /* [%r1 + %r2*1 + K] */ \ | 97 V(MR1I) /* [%r1 + %r2*1 + K] */ \ |
| 98 V(MR2I) /* [%r1 + %r2*2 + K] */ \ | 98 V(MR2I) /* [%r1 + %r2*2 + K] */ \ |
| 99 V(MR4I) /* [%r1 + %r2*3 + K] */ \ | 99 V(MR4I) /* [%r1 + %r2*3 + K] */ \ |
| 100 V(MR8I) /* [%r1 + %r2*4 + K] */ \ | 100 V(MR8I) /* [%r1 + %r2*4 + K] */ \ |
| 101 V(M1) /* [ %r2*1 ] */ \ | 101 V(M1) /* [ %r2*1 ] */ \ |
| 102 V(M2) /* [ %r2*2 ] */ \ | 102 V(M2) /* [ %r2*2 ] */ \ |
| 103 V(M4) /* [ %r2*4 ] */ \ | 103 V(M4) /* [ %r2*4 ] */ \ |
| 104 V(M8) /* [ %r2*8 ] */ \ | 104 V(M8) /* [ %r2*8 ] */ \ |
| 105 V(M1I) /* [ %r2*1 + K] */ \ | 105 V(M1I) /* [ %r2*1 + K] */ \ |
| 106 V(M2I) /* [ %r2*2 + K] */ \ | 106 V(M2I) /* [ %r2*2 + K] */ \ |
| 107 V(M4I) /* [ %r2*4 + K] */ \ | 107 V(M4I) /* [ %r2*4 + K] */ \ |
| 108 V(M8I) /* [ %r2*8 + K] */ | 108 V(M8I) /* [ %r2*8 + K] */ |
| 109 | 109 |
| 110 } // namespace compiler | 110 } // namespace compiler |
| 111 } // namespace internal | 111 } // namespace internal |
| 112 } // namespace v8 | 112 } // namespace v8 |
| 113 | 113 |
| 114 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ | 114 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_ |
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