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Side by Side Diff: src/assembler_ia32.cpp

Issue 650573002: emitIAS for the couple of blend instructions. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: remove isa Created 6 years, 2 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 // 4 //
5 // Modified by the Subzero authors. 5 // Modified by the Subzero authors.
6 // 6 //
7 //===- subzero/src/assembler_ia32.cpp - Assembler for x86-32 -------------===// 7 //===- subzero/src/assembler_ia32.cpp - Assembler for x86-32 -------------===//
8 // 8 //
9 // The Subzero Code Generator 9 // The Subzero Code Generator
10 // 10 //
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796 EmitOperand(dst, src); 796 EmitOperand(dst, src);
797 } 797 }
798 798
799 void AssemblerX86::orps(XmmRegister dst, XmmRegister src) { 799 void AssemblerX86::orps(XmmRegister dst, XmmRegister src) {
800 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 800 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
801 EmitUint8(0x0F); 801 EmitUint8(0x0F);
802 EmitUint8(0x56); 802 EmitUint8(0x56);
803 EmitXmmRegisterOperand(dst, src); 803 EmitXmmRegisterOperand(dst, src);
804 } 804 }
805 805
806 void AssemblerX86::blendvps(Type /* Ty */, XmmRegister dst, XmmRegister src) {
807 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
808 EmitUint8(0x66);
809 EmitUint8(0x0F);
810 EmitUint8(0x38);
811 EmitUint8(0x14);
812 EmitXmmRegisterOperand(dst, src);
813 }
814
815 void AssemblerX86::blendvps(Type /* Ty */, XmmRegister dst,
816 const Address &src) {
817 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
818 EmitUint8(0x66);
819 EmitUint8(0x0F);
820 EmitUint8(0x38);
821 EmitUint8(0x14);
822 EmitOperand(dst, src);
823 }
824
825 void AssemblerX86::pblendvb(Type /* Ty */, XmmRegister dst, XmmRegister src) {
826 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
827 EmitUint8(0x66);
828 EmitUint8(0x0F);
829 EmitUint8(0x38);
830 EmitUint8(0x10);
831 EmitXmmRegisterOperand(dst, src);
832 }
833
834 void AssemblerX86::pblendvb(Type /* Ty */, XmmRegister dst,
835 const Address &src) {
836 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
837 EmitUint8(0x66);
838 EmitUint8(0x0F);
839 EmitUint8(0x38);
840 EmitUint8(0x10);
841 EmitOperand(dst, src);
842 }
843
806 void AssemblerX86::cmpps(XmmRegister dst, XmmRegister src, 844 void AssemblerX86::cmpps(XmmRegister dst, XmmRegister src,
807 CondX86::CmppsCond CmpCondition) { 845 CondX86::CmppsCond CmpCondition) {
808 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 846 AssemblerBuffer::EnsureCapacity ensured(&buffer_);
809 EmitUint8(0x0F); 847 EmitUint8(0x0F);
810 EmitUint8(0xC2); 848 EmitUint8(0xC2);
811 EmitXmmRegisterOperand(dst, src); 849 EmitXmmRegisterOperand(dst, src);
812 EmitUint8(CmpCondition); 850 EmitUint8(CmpCondition);
813 } 851 }
814 852
815 void AssemblerX86::cmpps(XmmRegister dst, const Address &src, 853 void AssemblerX86::cmpps(XmmRegister dst, const Address &src,
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2315 assert(shifter == RegX8632::Encoded_Reg_ecx); 2353 assert(shifter == RegX8632::Encoded_Reg_ecx);
2316 (void)shifter; 2354 (void)shifter;
2317 if (Ty == IceType_i16) 2355 if (Ty == IceType_i16)
2318 EmitOperandSizeOverride(); 2356 EmitOperandSizeOverride();
2319 EmitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3); 2357 EmitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3);
2320 EmitOperand(rm, operand); 2358 EmitOperand(rm, operand);
2321 } 2359 }
2322 2360
2323 } // end of namespace x86 2361 } // end of namespace x86
2324 } // end of namespace Ice 2362 } // end of namespace Ice
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