emitIAS for the couple of blend instructions.

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 1049 matching lines @@
   emitIASOpTyGPR(Func, Ty, Src, Emitter);
 }
 
 namespace {
 
 // pblendvb and blendvps take xmm0 as a final implicit argument.
 void emitVariableBlendInst(const char *Opcode, const Inst *Inst,
                            const Cfg *Func) {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(Inst->getSrcSize() == 3);
-  assert(llvm::isa<Variable>(Inst->getSrc(2)));
   assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() ==
          RegX8632::Reg_xmm0);
   Str << "\t" << Opcode << "\t";
   Inst->getDest()->emit(Func);
   Str << ", ";
   Inst->getSrc(1)->emit(Func);
   Str << "\n";
 }
 
+void
+emitIASVariableBlendInst(const Inst *Inst, const Cfg *Func,
+                         const x86::AssemblerX86::XmmEmitterRegOp &Emitter) {
+  assert(Inst->getSrcSize() == 3);
+  assert(llvm::cast<Variable>(Inst->getSrc(2))->getRegNum() ==
+         RegX8632::Reg_xmm0);
+  const Variable *Dest = Inst->getDest();
+  const Operand *Src = Inst->getSrc(1);
+  emitIASRegOpTyXMM(Func, Dest->getType(), Dest, Src, Emitter);
+}
+
 } // end anonymous namespace
 
 template <> void InstX8632Blendvps::emit(const Cfg *Func) const {
   assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
          TargetX8632::SSE4_1);
   emitVariableBlendInst(Opcode, this, Func);
 }
 
+template <> void InstX8632Blendvps::emitIAS(const Cfg *Func) const {
+  assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
+         TargetX8632::SSE4_1);
+  static const x86::AssemblerX86::XmmEmitterRegOp Emitter = {
+      &x86::AssemblerX86::blendvps, &x86::AssemblerX86::blendvps};
+  emitIASVariableBlendInst(this, Func, Emitter);
+}
+
 template <> void InstX8632Pblendvb::emit(const Cfg *Func) const {
   assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
          TargetX8632::SSE4_1);
   emitVariableBlendInst(Opcode, this, Func);
 }
 
+template <> void InstX8632Pblendvb::emitIAS(const Cfg *Func) const {
+  assert(static_cast<TargetX8632 *>(Func->getTarget())->getInstructionSet() >=
+         TargetX8632::SSE4_1);
+  static const x86::AssemblerX86::XmmEmitterRegOp Emitter = {
+      &x86::AssemblerX86::pblendvb, &x86::AssemblerX86::pblendvb};
+  emitIASVariableBlendInst(this, Func, Emitter);
+}
+
 template <> void InstX8632Imul::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   if (isByteSizedArithType(getDest()->getType())) {
     // The 8-bit version of imul only allows the form "imul r/m8".
     Variable *Src0 = llvm::dyn_cast<Variable>(getSrc(0));
     (void)Src0;
     assert(Src0 && Src0->getRegNum() == RegX8632::Reg_eax);
     Str << "\timul\t";
     getSrc(1)->emit(Func);
@@ skipping 1434 matching lines @@
   }
   Str << "(";
   if (Func)
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // end of namespace Ice