Handle "Mov" which is mov, movss, movsd, and used for nacl.read.tp.

tests_lit/llvm2ice_tests/convert.ll

 ; Simple test of signed and unsigned integer conversions.
 
 ; TODO(jvoung): llvm-objdump doesn't symbolize global symbols well, so we
 ; have [0] == i8v, [2] == i16v, [4] == i32v, [8] == i64v, etc.
 
 ; RUN: %p2i -i %s --args -O2 --verbose none \
 ; RUN:   | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
 ; RUN:   | llvm-objdump -d --symbolize -x86-asm-syntax=intel - | FileCheck %s
 ; RUN: %p2i -i %s --args -Om1 --verbose none \
 ; RUN:   | llvm-mc -triple=i686-none-nacl -x86-asm-syntax=intel -filetype=obj \
@@ skipping 25 matching lines @@
   ret void
 }
 ; CHECK-LABEL: from_int8
 ; CHECK: mov {{.*}}, byte ptr [
 ; CHECK: movsx
 ; CHECK: mov word ptr [
 ; CHECK: movsx
 ; CHECK: mov dword ptr [
 ; CHECK: movsx
 ; CHECK: sar {{.*}}, 31
-; CHECK: [8]
+; This appears to be a bug in llvm-mc. It should be [8] and [12] to represent
+; i64v and i64+4.

[jvoung (off chromium), 2014/10/10 00:55:49]

I'll see if this is fixed by adding Store::emitIAS()

+; CHECK-DAG: [8]
+; CHECK-DAG: [8]
 
 define void @from_int16() {
 entry:
   %__0 = bitcast [2 x i8]* @i16v to i16*
   %v0 = load i16* %__0, align 1
   %v1 = trunc i16 %v0 to i8
   %__3 = bitcast [1 x i8]* @i8v to i8*
   store i8 %v1, i8* %__3, align 1
   %v2 = sext i16 %v0 to i32
   %__5 = bitcast [4 x i8]* @i32v to i32*
@@ skipping 142 matching lines @@
   store i32 %v3, i32* %__7, align 1
   ret void
 }
 ; CHECK-LABEL: from_uint64
 ; CHECK: [24]
 ; CHECK: [0]
 ; CHECK: [2]
 ; CHECK: [4]
 
 ; ERRORS-NOT: ICE translation error