Handle "Mov" which is mov, movss, movsd, and used for nacl.read.tp.

src/assembler_ia32.cpp

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===- subzero/src/assembler_ia32.cpp - Assembler for x86-32  -------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the Assembler class for x86-32.
 //
 //===----------------------------------------------------------------------===//
 
 #include "assembler_ia32.h"
 #include "IceCfg.h"
 #include "IceMemoryRegion.h"
 #include "IceOperand.h"
 
 namespace Ice {
 namespace x86 {
 
-const Type BrokenType = IceType_i32;
-
 class DirectCallRelocation : public AssemblerFixup {
 public:
   static DirectCallRelocation *create(Assembler *Asm, FixupKind Kind,
                                       const ConstantRelocatable *Sym) {
     return new (Asm->Allocate<DirectCallRelocation>())
         DirectCallRelocation(Kind, Sym);
   }
 
   void Process(const MemoryRegion &region, intptr_t position) override {
     // Direct calls are relative to the following instruction on x86.
@@ skipping 15 matching lines @@
   llvm::raw_string_ostream StrBuf(Buffer);
   Type Ty = Imm->getType();
   assert(llvm::isa<ConstantFloat>(Imm) || llvm::isa<ConstantDouble>(Imm));
   StrBuf << "L$" << Ty << "$" << Imm->getPoolEntryID();
   const int64_t Offset = 0;
   const bool SuppressMangling = true;
   Constant *Sym =
       Ctx->getConstantSym(Ty, Offset, StrBuf.str(), SuppressMangling);
   AssemblerFixup *Fixup = x86::DisplacementRelocation::create(
       Asm, FK_Abs_4, llvm::cast<ConstantRelocatable>(Sym));
-  return x86::Address::Absolute(Offset, Fixup);
+  return x86::Address::Absolute(Fixup);
 }
 
 void AssemblerX86::call(GPRRegister reg) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0xFF);
   EmitRegisterOperand(2, reg);
 }
 
 void AssemblerX86::call(const Address &address) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
@@ skipping 44 matching lines @@
   EmitUint8(0x61);
 }
 
 void AssemblerX86::setcc(CondX86::BrCond condition, ByteRegister dst) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
   EmitUint8(0x90 + condition);
   EmitUint8(0xC0 + dst);
 }
 
-void AssemblerX86::movl(GPRRegister dst, const Immediate &imm) {
+void AssemblerX86::mov(Type Ty, GPRRegister dst, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  if (isByteSizedType(Ty)) {
+    EmitUint8(0xB0 + dst);
+    EmitUint8(imm.value() & 0xFF);
+    return;
+  }
+  if (Ty == IceType_i16)
+    EmitOperandSizeOverride();
   EmitUint8(0xB8 + dst);
-  EmitImmediate(BrokenType, imm);
+  EmitImmediate(Ty, imm);
 }
 
-void AssemblerX86::movl(GPRRegister dst, GPRRegister src) {
+void AssemblerX86::mov(Type Ty, GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0x89);
+  if (Ty == IceType_i16)
+    EmitOperandSizeOverride();
+  if (isByteSizedType(Ty)) {
+    EmitUint8(0x88);
+  } else {
+    EmitUint8(0x89);
+  }
   EmitRegisterOperand(src, dst);
 }
 
-void AssemblerX86::movl(GPRRegister dst, const Address &src) {
+void AssemblerX86::mov(Type Ty, GPRRegister dst, const Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0x8B);
+  if (Ty == IceType_i16)
+    EmitOperandSizeOverride();
+  if (isByteSizedType(Ty)) {
+    EmitUint8(0x8A);
+  } else {
+    EmitUint8(0x8B);
+  }
   EmitOperand(dst, src);
 }
 
-void AssemblerX86::movl(const Address &dst, GPRRegister src) {
+void AssemblerX86::mov(Type Ty, const Address &dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0x89);
+  if (Ty == IceType_i16)
+    EmitOperandSizeOverride();
+  if (isByteSizedType(Ty)) {
+    EmitUint8(0x88);
+  } else {
+    EmitUint8(0x89);
+  }
   EmitOperand(src, dst);
 }
 
-void AssemblerX86::movl(const Address &dst, const Immediate &imm) {
+void AssemblerX86::mov(Type Ty, const Address &dst, const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xC7);
-  EmitOperand(0, dst);
-  EmitImmediate(BrokenType, imm);
+  if (Ty == IceType_i16)
+    EmitOperandSizeOverride();
+  if (isByteSizedType(Ty)) {
+    EmitUint8(0xC6);
+    EmitOperand(0, dst);
+    EmitUint8(imm.value() & 0xFF);
+  } else {
+    EmitUint8(0xC7);
+    EmitOperand(0, dst);
+    EmitImmediate(Ty, imm);
+  }
 }
 
 void AssemblerX86::movzxb(GPRRegister dst, ByteRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
   EmitUint8(0xB6);
   EmitRegisterOperand(dst, src);
 }
 
 void AssemblerX86::movzxb(GPRRegister dst, const Address &src) {
@@ skipping 10 matching lines @@
   EmitRegisterOperand(dst, src);
 }
 
 void AssemblerX86::movsxb(GPRRegister dst, const Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
   EmitUint8(0xBE);
   EmitOperand(dst, src);
 }
 
-void AssemblerX86::movb(ByteRegister dst, const Address &src) {
-  (void)dst;
-  (void)src;
-  // FATAL
-  llvm_unreachable("Use movzxb or movsxb instead.");
-}
-
-void AssemblerX86::movb(const Address &dst, ByteRegister src) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0x88);
-  EmitOperand(src, dst);
-}
-
-void AssemblerX86::movb(const Address &dst, const Immediate &imm) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitUint8(0xC6);
-  EmitOperand(RegX8632::Encoded_Reg_eax, dst);
-  assert(imm.is_int8());
-  EmitUint8(imm.value() & 0xFF);
-}
-
 void AssemblerX86::movzxw(GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
   EmitUint8(0xB7);
   EmitRegisterOperand(dst, src);
 }
 
 void AssemblerX86::movzxw(GPRRegister dst, const Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
   EmitUint8(0xB7);
   EmitOperand(dst, src);
 }
 
 void AssemblerX86::movsxw(GPRRegister dst, GPRRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
   EmitUint8(0xBF);
   EmitRegisterOperand(dst, src);
 }
 
 void AssemblerX86::movsxw(GPRRegister dst, const Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
   EmitUint8(0xBF);
   EmitOperand(dst, src);
 }
 
-void AssemblerX86::movw(GPRRegister dst, const Address &src) {
-  (void)dst;
-  (void)src;
-  // FATAL
-  llvm_unreachable("Use movzxw or movsxw instead.");
-}
-
-void AssemblerX86::movw(const Address &dst, GPRRegister src) {
-  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  EmitOperandSizeOverride();
-  EmitUint8(0x89);
-  EmitOperand(src, dst);
-}
-
 void AssemblerX86::lea(Type Ty, GPRRegister dst, const Address &src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   assert(Ty == IceType_i16 || Ty == IceType_i32);
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
   EmitUint8(0x8D);
   EmitOperand(dst, src);
 }
 
 void AssemblerX86::cmov(CondX86::BrCond cond, GPRRegister dst,
@@ skipping 620 matching lines @@
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x66);
   EmitUint8(0x0F);
   EmitUint8(0x15);
   EmitXmmRegisterOperand(dst, src);
 }
 
 void AssemblerX86::set1ps(XmmRegister dst, GPRRegister tmp1,
                           const Immediate &imm) {
   // Load 32-bit immediate value into tmp1.
-  movl(tmp1, imm);
+  mov(IceType_i32, tmp1, imm);
   // Move value from tmp1 into dst.
   movd(dst, tmp1);
   // Broadcast low lane into other three lanes.
   shufps(dst, dst, Immediate(0x0));
 }
 
 void AssemblerX86::shufps(XmmRegister dst, XmmRegister src,
                           const Immediate &imm) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);
@@ skipping 1320 matching lines @@
   }
   // Emit the rest of the encoded operand.
   for (intptr_t i = 1; i < length; i++) {
     EmitUint8(operand.encoding_[i]);
   }
 }
 
 void AssemblerX86::EmitImmediate(Type Ty, const Immediate &imm) {
   if (Ty == IceType_i16)
     EmitInt16(imm.value());
-  else
+  else {
+    if (imm.fixup()) {
+      EmitFixup(imm.fixup());
+    }
     EmitInt32(imm.value());
+  }
 }
 
 void AssemblerX86::EmitComplexI8(int rm, const Operand &operand,
                                  const Immediate &immediate) {
   assert(rm >= 0 && rm < 8);
   assert(immediate.is_int8());
   if (operand.IsRegister(RegX8632::Encoded_Reg_eax)) {
     // Use short form if the destination is al.
     EmitUint8(0x04 + (rm << 3));
     EmitUint8(immediate.value() & 0xFF);
@@ skipping 70 matching lines @@
   assert(shifter == RegX8632::Encoded_Reg_ecx);
   (void)shifter;
   if (Ty == IceType_i16)
     EmitOperandSizeOverride();
   EmitUint8(isByteSizedArithType(Ty) ? 0xD2 : 0xD3);
   EmitOperand(rm, operand);
 }
 
 } // end of namespace x86
 } // end of namespace Ice