Handle "Mov" which is mov, movss, movsd, and used for nacl.read.tp.

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 44 matching lines @@
   const char *WidthString; // {byte,word,dword,qword} ptr
 } TypeX8632Attributes[] = {
 #define X(tag, elementty, cvt, sdss, pack, width)                              \
   { cvt, "" sdss, pack, width }                                                \
   ,
     ICETYPEX8632_TABLE
 #undef X
   };
 
 const char *InstX8632SegmentRegNames[] = {
-#define X(val, name) name,
+#define X(val, name, prefix) name,
   SEG_REGX8632_TABLE
 #undef X
 };
+
+uint8_t InstX8632SegmentPrefixes[] = {
+#define X(val, name, prefix) prefix,
+  SEG_REGX8632_TABLE
+#undef X
+};
 
 } // end of anonymous namespace
 
 const char *InstX8632::getWidthString(Type Ty) {
   return TypeX8632Attributes[Ty].WidthString;
 }
 
 OperandX8632Mem::OperandX8632Mem(Cfg *Func, Type Ty, Variable *Base,
                                  Constant *Offset, Variable *Index,
                                  uint16_t Shift, SegmentRegisters SegmentReg)
@@ skipping 248 matching lines @@
 InstX8632Xchg::InstX8632Xchg(Cfg *Func, Operand *Dest, Variable *Source)
     : InstX8632(Func, InstX8632::Xchg, 2, llvm::dyn_cast<Variable>(Dest)) {
   addSource(Dest);
   addSource(Source);
 }
 
 // ======================== Dump routines ======================== //
 
 namespace {
 
-void emitIASBytes(Ostream &Str, const x86::AssemblerX86 *Asm,
+void emitIASBytes(const Cfg *Func, const x86::AssemblerX86 *Asm,
                   intptr_t StartPosition) {
+  GlobalContext *Ctx = Func->getContext();
+  Ostream &Str = Ctx->getStrEmit();
   intptr_t EndPosition = Asm->GetPosition();
   intptr_t LastFixupLoc = -1;
   AssemblerFixup *LastFixup = NULL;
   if (Asm->GetLatestFixup()) {
     LastFixup = Asm->GetLatestFixup();
     LastFixupLoc = LastFixup->position();
   }
   if (LastFixupLoc < StartPosition) {
     // The fixup doesn't apply to this current block.
     for (intptr_t i = StartPosition; i < EndPosition; ++i) {
       Str << "\t.byte 0x";
       Str.write_hex(Asm->LoadBuffer<uint8_t>(i));
       Str << "\n";
     }
     return;
   }
   const intptr_t FixupSize = 4;
   assert(LastFixupLoc + FixupSize <= EndPosition);
   // The fixup does apply to this current block.
   for (intptr_t i = StartPosition; i < LastFixupLoc; ++i) {
     Str << "\t.byte 0x";
     Str.write_hex(Asm->LoadBuffer<uint8_t>(i));
     Str << "\n";
   }
-  Str << "\t.long " << LastFixup->value()->getName();
+  Str << "\t.long ";
+  const ConstantRelocatable *Reloc = LastFixup->value();
+  if (Reloc->getSuppressMangling())
+    Str << Reloc->getName();
+  else
+    Str << Ctx->mangleName(Reloc->getName());
   if (LastFixup->value()->getOffset()) {
     Str << " + " << LastFixup->value()->getOffset();
   }
   Str << "\n";
   for (intptr_t i = LastFixupLoc + FixupSize; i < EndPosition; ++i) {
     Str << "\t.byte 0x";
     Str.write_hex(Asm->LoadBuffer<uint8_t>(i));
     Str << "\n";
   }
 }
@@ skipping 102 matching lines @@
   }
   if (!EmittedSrc1)
     Inst->getSrc(1)->emit(Func);
   Str << "\n";
 }
 
 void emitIASOpTyGPR(const Cfg *Func, Type Ty, const Operand *Op,
                     const x86::AssemblerX86::GPREmitterOneOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
-  if (const Variable *Var = llvm::dyn_cast<Variable>(Op)) {
+  if (const auto Var = llvm::dyn_cast<Variable>(Op)) {
     if (Var->hasReg()) {
       // We cheat a little and use GPRRegister even for byte operations.
       RegX8632::GPRRegister VarReg =
           RegX8632::getEncodedByteRegOrGPR(Ty, Var->getRegNum());
       (Asm->*(Emitter.Reg))(Ty, VarReg);
     } else {
       x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
                                  ->stackVarToAsmOperand(Var));
       (Asm->*(Emitter.Addr))(Ty, StackAddr);
     }
-  } else if (const OperandX8632Mem *Mem = llvm::dyn_cast<OperandX8632Mem>(Op)) {
+  } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Op)) {
+    Mem->emitSegmentOverride(Asm);
     (Asm->*(Emitter.Addr))(Ty, Mem->toAsmAddress(Asm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void emitIASRegOpTyGPR(const Cfg *Func, Type Ty, const Variable *Var,
                        const Operand *Src,
                        const x86::AssemblerX86::GPREmitterRegOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(Var->hasReg());
   // We cheat a little and use GPRRegister even for byte operations.
   RegX8632::GPRRegister VarReg =
       RegX8632::getEncodedByteRegOrGPR(Ty, Var->getRegNum());
-  if (const Variable *SrcVar = llvm::dyn_cast<Variable>(Src)) {
+  if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
     if (SrcVar->hasReg()) {
       RegX8632::GPRRegister SrcReg =
           RegX8632::getEncodedByteRegOrGPR(Ty, SrcVar->getRegNum());
       (Asm->*(Emitter.GPRGPR))(Ty, VarReg, SrcReg);
     } else {
       x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
                                       ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.GPRAddr))(Ty, VarReg, SrcStackAddr);
     }
-  } else if (const OperandX8632Mem *Mem =
-                 llvm::dyn_cast<OperandX8632Mem>(Src)) {
-    x86::Address SrcAddr = Mem->toAsmAddress(Asm);
+  } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
+    Mem->emitSegmentOverride(Asm);
+    (Asm->*(Emitter.GPRAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
+  } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
+    (Asm->*(Emitter.GPRImm))(Ty, VarReg, x86::Immediate(Imm->getValue()));
+  } else if (const auto Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) {
+    AssemblerFixup *Fixup = x86::DisplacementRelocation::create(
+        Asm, FK_Abs_4, Reloc);
+    (Asm->*(Emitter.GPRImm))(Ty, VarReg, x86::Immediate(Fixup));
+  } else if (const auto Split = llvm::dyn_cast<VariableSplit>(Src)) {
+    x86::Address SrcAddr = Split->toAsmAddress(Func);
     (Asm->*(Emitter.GPRAddr))(Ty, VarReg, SrcAddr);
-  } else if (const ConstantInteger32 *Imm =
-                 llvm::dyn_cast<ConstantInteger32>(Src)) {
-    (Asm->*(Emitter.GPRImm))(Ty, VarReg, x86::Immediate(Imm->getValue()));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void emitIASAddrOpTyGPR(const Cfg *Func, Type Ty, const x86::Address &Addr,
                         const Operand *Src,
                         const x86::AssemblerX86::GPREmitterAddrOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   // Src can only be Reg or Immediate.
-  if (const Variable *SrcVar = llvm::dyn_cast<Variable>(Src)) {
+  if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
     assert(SrcVar->hasReg());
     RegX8632::GPRRegister SrcReg =
         RegX8632::getEncodedByteRegOrGPR(Ty, SrcVar->getRegNum());
     (Asm->*(Emitter.AddrGPR))(Ty, Addr, SrcReg);
-  } else if (const ConstantInteger32 *Imm =
-                 llvm::dyn_cast<ConstantInteger32>(Src)) {
+  } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
     (Asm->*(Emitter.AddrImm))(Ty, Addr, x86::Immediate(Imm->getValue()));
+  } else if (const auto Reloc = llvm::dyn_cast<ConstantRelocatable>(Src)) {
+    AssemblerFixup *Fixup = x86::DisplacementRelocation::create(
+        Asm, FK_Abs_4, Reloc);
+    (Asm->*(Emitter.AddrImm))(Ty, Addr, x86::Immediate(Fixup));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void emitIASGPRShift(const Cfg *Func, Type Ty, const Variable *Var,
                      const Operand *Src,
                      const x86::AssemblerX86::GPREmitterShiftOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   // Technically, the Dest Var can be mem as well, but we only use Reg.
   // We can extend this to check Dest if we decide to use that form.
   assert(Var->hasReg());
   // We cheat a little and use GPRRegister even for byte operations.
   RegX8632::GPRRegister VarReg =
       RegX8632::getEncodedByteRegOrGPR(Ty, Var->getRegNum());
   // Src must be reg == ECX or an Imm8.
   // This is asserted by the assembler.
-  if (const Variable *SrcVar = llvm::dyn_cast<Variable>(Src)) {
+  if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
     assert(SrcVar->hasReg());
     RegX8632::GPRRegister SrcReg =
         RegX8632::getEncodedByteRegOrGPR(Ty, SrcVar->getRegNum());
     (Asm->*(Emitter.GPRGPR))(Ty, VarReg, SrcReg);
-  } else if (const ConstantInteger32 *Imm =
-                 llvm::dyn_cast<ConstantInteger32>(Src)) {
+  } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
     (Asm->*(Emitter.GPRImm))(Ty, VarReg, x86::Immediate(Imm->getValue()));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void emitIASXmmShift(const Cfg *Func, Type Ty, const Variable *Var,
                      const Operand *Src,
                      const x86::AssemblerX86::XmmEmitterShiftOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(Var->hasReg());
   RegX8632::XmmRegister VarReg = RegX8632::getEncodedXmm(Var->getRegNum());
-  if (const Variable *SrcVar = llvm::dyn_cast<Variable>(Src)) {
+  if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
     if (SrcVar->hasReg()) {
       RegX8632::XmmRegister SrcReg =
           RegX8632::getEncodedXmm(SrcVar->getRegNum());
       (Asm->*(Emitter.XmmXmm))(Ty, VarReg, SrcReg);
     } else {
       x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
                                       ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
     }
-  } else if (const OperandX8632Mem *Mem =
-                 llvm::dyn_cast<OperandX8632Mem>(Src)) {
-    x86::Address SrcAddr = Mem->toAsmAddress(Asm);
-    (Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcAddr);
-  } else if (const ConstantInteger32 *Imm =
-                 llvm::dyn_cast<ConstantInteger32>(Src)) {
+  } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
+    assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
+    (Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
+  } else if (const auto Imm = llvm::dyn_cast<ConstantInteger32>(Src)) {
     (Asm->*(Emitter.XmmImm))(Ty, VarReg, x86::Immediate(Imm->getValue()));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void emitIASRegOpTyXMM(const Cfg *Func, Type Ty, const Variable *Var,
                        const Operand *Src,
                        const x86::AssemblerX86::XmmEmitterRegOp &Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(Var->hasReg());
   RegX8632::XmmRegister VarReg = RegX8632::getEncodedXmm(Var->getRegNum());
-  if (const Variable *SrcVar = llvm::dyn_cast<Variable>(Src)) {
+  if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
     if (SrcVar->hasReg()) {
       RegX8632::XmmRegister SrcReg =
           RegX8632::getEncodedXmm(SrcVar->getRegNum());
       (Asm->*(Emitter.XmmXmm))(Ty, VarReg, SrcReg);
     } else {
       x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
                                       ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcStackAddr);
     }
-  } else if (const OperandX8632Mem *Mem =
-                 llvm::dyn_cast<OperandX8632Mem>(Src)) {
-    x86::Address SrcAddr = Mem->toAsmAddress(Asm);
-    (Asm->*(Emitter.XmmAddr))(Ty, VarReg, SrcAddr);
-  } else if (const Constant *Imm = llvm::dyn_cast<Constant>(Src)) {
+  } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
+    assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
+    (Asm->*(Emitter.XmmAddr))(Ty, VarReg, Mem->toAsmAddress(Asm));
+  } else if (const auto Imm = llvm::dyn_cast<Constant>(Src)) {
     (Asm->*(Emitter.XmmAddr))(
         Ty, VarReg, x86::Address::ofConstPool(Func->getContext(), Asm, Imm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 template <typename DReg_t, typename SReg_t, DReg_t (*destEnc)(int32_t),
           SReg_t (*srcEnc)(int32_t)>
 void emitIASCastRegOp(
     const Cfg *Func, Type DispatchTy, const Variable *Dest, const Operand *Src,
     const x86::AssemblerX86::CastEmitterRegOp<DReg_t, SReg_t> Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(Dest->hasReg());
   DReg_t DestReg = destEnc(Dest->getRegNum());
-  if (const Variable *SrcVar = llvm::dyn_cast<Variable>(Src)) {
+  if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
     if (SrcVar->hasReg()) {
       SReg_t SrcReg = srcEnc(SrcVar->getRegNum());
       (Asm->*(Emitter.RegReg))(DispatchTy, DestReg, SrcReg);
     } else {
       x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
                                       ->stackVarToAsmOperand(SrcVar);
       (Asm->*(Emitter.RegAddr))(DispatchTy, DestReg, SrcStackAddr);
     }
-  } else if (const OperandX8632Mem *Mem =
-                 llvm::dyn_cast<OperandX8632Mem>(Src)) {
-    x86::Address SrcAddr = Mem->toAsmAddress(Asm);
-    (Asm->*(Emitter.RegAddr))(DispatchTy, DestReg, SrcAddr);
+  } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
+    Mem->emitSegmentOverride(Asm);
+    (Asm->*(Emitter.RegAddr))(DispatchTy, DestReg, Mem->toAsmAddress(Asm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void emitIASMovlikeXMM(const Cfg *Func, const Variable *Dest,
                        const Operand *Src,
                        const x86::AssemblerX86::XmmEmitterMovOps Emitter) {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   if (Dest->hasReg()) {
     RegX8632::XmmRegister DestReg = RegX8632::getEncodedXmm(Dest->getRegNum());
-    if (const Variable *SrcVar = llvm::dyn_cast<Variable>(Src)) {
+    if (const auto SrcVar = llvm::dyn_cast<Variable>(Src)) {
       if (SrcVar->hasReg()) {
         (Asm->*(Emitter.XmmXmm))(DestReg,
                                  RegX8632::getEncodedXmm(SrcVar->getRegNum()));
       } else {
         x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
                                    ->stackVarToAsmOperand(SrcVar));
         (Asm->*(Emitter.XmmAddr))(DestReg, StackAddr);
       }
-    } else if (const OperandX8632Mem *SrcMem =
-                   llvm::dyn_cast<OperandX8632Mem>(Src)) {
+    } else if (const auto SrcMem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
+      assert(SrcMem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
       (Asm->*(Emitter.XmmAddr))(DestReg, SrcMem->toAsmAddress(Asm));
     } else {
       llvm_unreachable("Unexpected operand type");
     }
   } else {
     x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
                                ->stackVarToAsmOperand(Dest));
     // Src must be a register in this case.
     const Variable *SrcVar = llvm::cast<Variable>(Src);
     assert(SrcVar->hasReg());
     (Asm->*(Emitter.AddrXmm))(StackAddr,
                               RegX8632::getEncodedXmm(SrcVar->getRegNum()));
   }
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 bool checkForRedundantAssign(const Variable *Dest, const Operand *Source) {
   const Variable *Src = llvm::dyn_cast<const Variable>(Source);
   if (Src == NULL)
     return false;
   if (Dest->hasReg() && Dest->getRegNum() == Src->getRegNum()) {
     // TODO: On x86-64, instructions like "mov eax, eax" are used to
     // clear the upper 32 bits of rax.  We need to recognize and
     // preserve these.
@@ skipping 436 matching lines @@
     Str << "\tcwd\n";
     break;
   case IceType_i32:
     assert(getDest()->getRegNum() == RegX8632::Reg_edx);
     Str << "\tcdq\n";
     break;
   }
 }
 
 template <> void InstX8632Cbwdq::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(getSrcSize() == 1);
   Operand *Src0 = getSrc(0);
   assert(llvm::isa<Variable>(Src0));
   assert(llvm::cast<Variable>(Src0)->getRegNum() == RegX8632::Reg_eax);
   switch (Src0->getType()) {
   default:
     llvm_unreachable("unexpected source type!");
     break;
   case IceType_i8:
     assert(getDest()->getRegNum() == RegX8632::Reg_eax);
     Asm->cbw();
     break;
   case IceType_i16:
     assert(getDest()->getRegNum() == RegX8632::Reg_edx);
     Asm->cwd();
     break;
   case IceType_i32:
     assert(getDest()->getRegNum() == RegX8632::Reg_edx);
     Asm->cdq();
     break;
   }
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Mul::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(llvm::isa<Variable>(getSrc(0)));
   assert(llvm::dyn_cast<Variable>(getSrc(0))->getRegNum() == RegX8632::Reg_eax);
   assert(getDest()->getRegNum() == RegX8632::Reg_eax); // TODO: allow edx?
   Str << "\tmul\t";
   getSrc(1)->emit(Func);
@@ skipping 77 matching lines @@
   assert(Condition != CondX86::Br_None);
   assert(getDest()->hasReg());
   Str << "cmov" << InstX8632BrAttributes[Condition].DisplayString << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
 void InstX8632Cmov::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
-  Str << "\t";
   assert(Condition != CondX86::Br_None);
   assert(getDest()->hasReg());
   assert(getSrcSize() == 2);
   // Only need the reg/reg form now.
   const Variable *Src = llvm::cast<Variable>(getSrc(1));
   assert(Src->hasReg());
   assert(Src->getType() == IceType_i32);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Asm->cmov(Condition, RegX8632::getEncodedGPR(getDest()->getRegNum()),
             RegX8632::getEncodedGPR(Src->getRegNum()));
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Cmov::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "cmov" << InstX8632BrAttributes[Condition].DisplayString << ".";
   Str << getDest()->getType() << " ";
   dumpDest(Func);
   Str << ", ";
   dumpSources(Func);
 }
 
 void InstX8632Cmpps::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(Condition < CondX86::Cmpps_Invalid);
   Str << "\t";
   Str << "cmp" << InstX8632CmppsAttributes[Condition].EmitString << "ps"
       << "\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
 void InstX8632Cmpps::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(getSrcSize() == 2);
   assert(Condition < CondX86::Cmpps_Invalid);
   // Assuming there isn't any load folding for cmpps, and vector constants
   // are not allowed in PNaCl.
   assert(llvm::isa<Variable>(getSrc(1)));
   const Variable *SrcVar = llvm::cast<Variable>(getSrc(1));
   if (SrcVar->hasReg()) {
     Asm->cmpps(RegX8632::getEncodedXmm(getDest()->getRegNum()),
                RegX8632::getEncodedXmm(SrcVar->getRegNum()), Condition);
   } else {
     x86::Address SrcStackAddr = static_cast<TargetX8632 *>(Func->getTarget())
                                     ->stackVarToAsmOperand(SrcVar);
     Asm->cmpps(RegX8632::getEncodedXmm(getDest()->getRegNum()), SrcStackAddr,
                Condition);
   }
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Cmpps::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   assert(Condition < CondX86::Cmpps_Invalid);
   dumpDest(Func);
   Str << " = cmp" << InstX8632CmppsAttributes[Condition].EmitString << "ps"
       << "\t";
   dumpSources(Func);
 }
 
 void InstX8632Cmpxchg::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\tcmpxchg\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(2)->emit(Func);
   Str << "\n";
 }
 
 void InstX8632Cmpxchg::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 3);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Type Ty = getSrc(0)->getType();
   const OperandX8632Mem *Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
+  assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
   const Variable *VarReg = llvm::cast<Variable>(getSrc(2));
   assert(VarReg->hasReg());
   const RegX8632::GPRRegister Reg =
       RegX8632::getEncodedGPR(VarReg->getRegNum());
   if (Locked) {
     Asm->LockCmpxchg(Ty, Addr, Reg);
   } else {
     Asm->cmpxchg(Ty, Addr, Reg);
   }
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Cmpxchg::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
   Str << "cmpxchg." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Cmpxchg8b::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 5);
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\tcmpxchg8b\t";
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
 void InstX8632Cmpxchg8b::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 5);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   const OperandX8632Mem *Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
+  assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
   if (Locked) {
     Asm->lock();
   }
   Asm->cmpxchg8b(Addr);
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Cmpxchg8b::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
   Str << "cmpxchg8b ";
   dumpSources(Func);
 }
@@ skipping 107 matching lines @@
     if (SrcVar0->hasReg()) {
       emitIASRegOpTyGPR(Func, Ty, SrcVar0, Src1, RegEmitter);
     } else {
       x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
                                  ->stackVarToAsmOperand(SrcVar0));
       emitIASAddrOpTyGPR(Func, Ty, StackAddr, Src1, AddrEmitter);
     }
   } else if (const OperandX8632Mem *SrcMem0 =
                  llvm::dyn_cast<OperandX8632Mem>(Src0)) {
     x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+    SrcMem0->emitSegmentOverride(Asm);
     emitIASAddrOpTyGPR(Func, Ty, SrcMem0->toAsmAddress(Asm), Src1, AddrEmitter);
   }
 }
 
 void InstX8632Icmp::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "cmp." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
@@ skipping 30 matching lines @@
 void InstX8632UD2::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   Str << "\tud2\n";
 }
 
 void InstX8632UD2::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Asm->ud2();
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632UD2::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "ud2\n";
 }
 
 void InstX8632Test::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
@@ skipping 22 matching lines @@
     } else {
       llvm_unreachable("Nothing actually generates this so it's untested");
       x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
                                  ->stackVarToAsmOperand(SrcVar0));
       emitIASAddrOpTyGPR(Func, Ty, StackAddr, Src1, AddrEmitter);
     }
   } else if (const OperandX8632Mem *SrcMem0 =
                  llvm::dyn_cast<OperandX8632Mem>(Src0)) {
     llvm_unreachable("Nothing actually generates this so it's untested");
     x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+    SrcMem0->emitSegmentOverride(Asm);
     emitIASAddrOpTyGPR(Func, Ty, SrcMem0->toAsmAddress(Asm), Src1, AddrEmitter);
   }
 }
 
 void InstX8632Test::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "test." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Mfence::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   Str << "\tmfence\n";
 }
 
 void InstX8632Mfence::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Asm->mfence();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Mfence::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "mfence\n";
 }
 
 void InstX8632Store::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
@@ skipping 22 matching lines @@
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
 void InstX8632StoreP::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(getSrcSize() == 2);
   const Variable *Src = llvm::cast<Variable>(getSrc(0));
   const OperandX8632Mem *DestMem = llvm::cast<OperandX8632Mem>(getSrc(1));
+  assert(DestMem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   assert(Src->hasReg());
   Asm->movups(DestMem->toAsmAddress(Asm),
               RegX8632::getEncodedXmm(Src->getRegNum()));
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632StoreP::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "storep." << getSrc(0)->getType() << " ";
   getSrc(1)->dump(Func);
   Str << ", ";
   getSrc(0)->dump(Func);
 }
 
 void InstX8632StoreQ::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   assert(getSrc(1)->getType() == IceType_i64 ||
          getSrc(1)->getType() == IceType_f64);
   Str << "\tmovq\t";
   getSrc(1)->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
 void InstX8632StoreQ::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(getSrcSize() == 2);
   const Variable *Src = llvm::cast<Variable>(getSrc(0));
   const OperandX8632Mem *DestMem = llvm::cast<OperandX8632Mem>(getSrc(1));
+  assert(DestMem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   assert(Src->hasReg());
   Asm->movq(DestMem->toAsmAddress(Asm),
             RegX8632::getEncodedXmm(Src->getRegNum()));
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632StoreQ::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "storeq." << getSrc(0)->getType() << " ";
   getSrc(1)->dump(Func);
   Str << ", ";
   getSrc(0)->dump(Func);
 }
 
@@ skipping 59 matching lines @@
     Str << "\n";
     Str << ".intel_syntax\n";
   } else {
     getDest()->asType(Src->getType()).emit(Func);
     Str << ", ";
     Src->emit(Func);
     Str << "\n";
   }
 }
 
+template <> void InstX8632Mov::emitIAS(const Cfg *Func) const {
+  assert(getSrcSize() == 1);
+  const Variable *Dest = getDest();
+  const Operand *Src = getSrc(0);
+  Type DestTy = Dest->getType();
+  Type SrcTy = Src->getType();
+  // Mov can be used for GPRs or XMM registers. Also, the type does not
+  // necessarily match (Mov can be used for bitcasts). However, when
+  // the type does not match, one of the operands must be a register.
+  // Thus, the strategy is to find out if Src or Dest are a register,
+  // then use that register's type to decide on which emitter set to use.
+  // The emitter set will include reg-reg movs, but that case should
+  // be unused when the types don't match.
+  static const x86::AssemblerX86::XmmEmitterRegOp XmmRegEmitter = {
+    &x86::AssemblerX86::movss, &x86::AssemblerX86::movss};
+  static const x86::AssemblerX86::GPREmitterRegOp GPRRegEmitter = {
+    &x86::AssemblerX86::mov, &x86::AssemblerX86::mov, &x86::AssemblerX86::mov};
+  static const x86::AssemblerX86::GPREmitterAddrOp GPRAddrEmitter = {
+    &x86::AssemblerX86::mov, &x86::AssemblerX86::mov};
+  // For an integer truncation operation, src is wider than dest.
+  // Ideally, we use a mov instruction whose data width matches the
+  // narrower dest.  This is a problem if e.g. src is a register like
+  // esi or si where there is no 8-bit version of the register.  To be
+  // safe, we instead widen the dest to match src.  This works even
+  // for stack-allocated dest variables because typeWidthOnStack()
+  // pads to a 4-byte boundary even if only a lower portion is used.
+  // TODO: This assert disallows usages such as copying a floating point
+  // value between a vector and a scalar (which movss is used for).
+  // Clean this up.
+  assert(Func->getTarget()->typeWidthInBytesOnStack(getDest()->getType()) ==
+         Func->getTarget()->typeWidthInBytesOnStack(Src->getType()));
+  if (Dest->hasReg()) {
+    if (isScalarFloatingType(DestTy)) {
+      emitIASRegOpTyXMM(Func, DestTy, Dest, Src, XmmRegEmitter);
+      return;
+    } else {
+      assert(isScalarIntegerType(DestTy));
+      // Widen DestTy for truncation (see above note). We should only do this
+      // when both Src and Dest are integer types.
+      if (isScalarIntegerType(SrcTy)) {
+        DestTy = SrcTy;
+      }
+      emitIASRegOpTyGPR(Func, DestTy, Dest, Src, GPRRegEmitter);
+      return;
+    }
+  } else {
+    // Dest must be Stack and Src *could* be a register. Use Src's type
+    // to decide on the emitters.
+    x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
+                           ->stackVarToAsmOperand(Dest));
+    if (isScalarFloatingType(SrcTy)) {
+      // Src must be a register.
+      const Variable *SrcVar = llvm::cast<Variable>(Src);
+      assert(SrcVar->hasReg());
+      x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
+      intptr_t StartPosition = Asm->GetPosition();
+      Asm->movss(SrcTy, StackAddr,
+                 RegX8632::getEncodedXmm(SrcVar->getRegNum()));
+      emitIASBytes(Func, Asm, StartPosition);
+      return;
+    } else {
+      // Src can be a register or immediate.
+      assert(isScalarIntegerType(SrcTy));
+      emitIASAddrOpTyGPR(Func, SrcTy, StackAddr, Src, GPRAddrEmitter);
+      return;
+    }
+    return;
+  }
+}
+
 template <> void InstX8632Movd::emitIAS(const Cfg *Func) const {
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(getSrcSize() == 1);
   const Variable *Dest = getDest();
   const Variable *Src = llvm::cast<Variable>(getSrc(0));
   // For insert/extract element (one of Src/Dest is an Xmm vector and
   // the other is an int type).
   if (Src->getType() == IceType_i32) {
     assert(isVectorType(Dest->getType()));
@@ skipping 12 matching lines @@
     assert(Dest->getType() == IceType_i32);
     RegX8632::XmmRegister SrcReg = RegX8632::getEncodedXmm(Src->getRegNum());
     if (Dest->hasReg()) {
       Asm->movd(RegX8632::getEncodedGPR(Dest->getRegNum()), SrcReg);
     } else {
       x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
                                  ->stackVarToAsmOperand(Dest));
       Asm->movd(StackAddr, SrcReg);
     }
   }
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 template <> void InstX8632Movp::emit(const Cfg *Func) const {
   // TODO(wala,stichnot): movups works with all vector operands, but
   // there exist other instructions (movaps, movdqa, movdqu) that may
   // perform better, depending on the data type and alignment of the
   // operands.
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tmovups\t";
@@ skipping 44 matching lines @@
   // where part of the Dest register is untouched.
   assert(getSrcSize() == 2);
   const Variable *Dest = getDest();
   assert(Dest == getSrc(0));
   const Variable *Src = llvm::cast<Variable>(getSrc(1));
   assert(Dest->hasReg() && Src->hasReg());
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Asm->movss(IceType_f32, RegX8632::getEncodedXmm(Dest->getRegNum()),
              RegX8632::getEncodedXmm(Src->getRegNum()));
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Movsx::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tmovsx\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << "\n";
@@ skipping 27 matching lines @@
   dumpSources(Func);
 }
 
 void InstX8632Nop::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   // TODO: Emit the right code for each variant.
   Str << "\tnop\t# variant = " << Variant << "\n";
 }
 
 void InstX8632Nop::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   // TODO: Emit the right code for the variant.
   Asm->nop();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Nop::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "nop (variant = " << Variant << ")";
 }
 
 void InstX8632Fld::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
@@ skipping 32 matching lines @@
       x86::Address StackSlot = x86::Address(RegX8632::Encoded_Reg_esp, 0);
       Asm->movss(Ty, StackSlot, RegX8632::getEncodedXmm(Var->getRegNum()));
       Asm->fld(Ty, StackSlot);
       Asm->add(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
     } else {
       x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
                                  ->stackVarToAsmOperand(Var));
       Asm->fld(Ty, StackAddr);
     }
   } else if (const auto Mem = llvm::dyn_cast<OperandX8632Mem>(Src)) {
+    assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
     Asm->fld(Ty, Mem->toAsmAddress(Asm));
   } else if (const auto Imm = llvm::dyn_cast<Constant>(Src)) {
     Asm->fld(Ty, x86::Address::ofConstPool(Func->getContext(), Asm, Imm));
   } else {
     llvm_unreachable("Unexpected operand type");
   }
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Fld::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "fld." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 void InstX8632Fstp::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
@@ skipping 30 matching lines @@
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   assert(getSrcSize() == 0);
   const Variable *Dest = getDest();
   // TODO(jvoung,stichnot): Utilize this by setting Dest to NULL to
   // "partially" delete the fstp if the Dest is unused.
   // Even if Dest is unused, the fstp should be kept for the SideEffects
   // of popping the stack.
   if (Dest == NULL) {
     Asm->fstp(RegX8632::getEncodedSTReg(0));
-    Ostream &Str = Func->getContext()->getStrEmit();
-    emitIASBytes(Str, Asm, StartPosition);
+    emitIASBytes(Func, Asm, StartPosition);
     return;
   }
   Type Ty = Dest->getType();
   if (!Dest->hasReg()) {
     x86::Address StackAddr(static_cast<TargetX8632 *>(Func->getTarget())
                                ->stackVarToAsmOperand(Dest));
     Asm->fstp(Ty, StackAddr);
   } else {
     // Dest is a physical (xmm) register, so st(0) needs to go through
     // memory.  Hack this by creating a temporary stack slot, spilling
     // st(0) there, loading it into the xmm register, and deallocating
     // the stack slot.
     x86::Immediate Width(typeWidthInBytes(Ty));
     Asm->sub(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
     x86::Address StackSlot = x86::Address(RegX8632::Encoded_Reg_esp, 0);
     Asm->fstp(Ty, StackSlot);
     Asm->movss(Ty, RegX8632::getEncodedXmm(Dest->getRegNum()), StackSlot);
     Asm->add(IceType_i32, RegX8632::Encoded_Reg_esp, Width);
   }
-  Ostream &Str = Func->getContext()->getStrEmit();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Fstp::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   dumpDest(Func);
   Str << " = fstp." << getDest()->getType() << ", st(0)";
   Str << "\n";
 }
 
 template <> void InstX8632Pcmpeq::emit(const Cfg *Func) const {
@@ skipping 61 matching lines @@
 
 void InstX8632Pop::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   Str << "\tpop\t";
   getDest()->emit(Func);
   Str << "\n";
 }
 
 void InstX8632Pop::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 0);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   if (getDest()->hasReg()) {
     Asm->popl(RegX8632::getEncodedGPR(getDest()->getRegNum()));
   } else {
     Asm->popl(static_cast<TargetX8632 *>(Func->getTarget())
                   ->stackVarToAsmOperand(getDest()));
   }
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Pop::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   dumpDest(Func);
   Str << " = pop." << getDest()->getType() << " ";
 }
 
 void InstX8632AdjustStack::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\tsub\tesp, " << Amount << "\n";
   Func->getTarget()->updateStackAdjustment(Amount);
 }
 
 void InstX8632AdjustStack::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Asm->sub(IceType_i32, RegX8632::Encoded_Reg_esp, x86::Immediate(Amount));
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
   Func->getTarget()->updateStackAdjustment(Amount);
 }
 
 void InstX8632AdjustStack::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "esp = sub.i32 esp, " << Amount;
 }
 
 void InstX8632Push::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   // Push is currently only used for saving GPRs.
   Variable *Var = llvm::cast<Variable>(getSrc(0));
   assert(Var->hasReg());
   Str << "\tpush\t";
   Var->emit(Func);
   Str << "\n";
 }
 
 void InstX8632Push::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   // Push is currently only used for saving GPRs.
   Variable *Var = llvm::cast<Variable>(getSrc(0));
   assert(Var->hasReg());
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Asm->pushl(RegX8632::getEncodedGPR(Var->getRegNum()));
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Push::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "push." << getSrc(0)->getType() << " ";
   dumpSources(Func);
 }
 
 template <> void InstX8632Psll::emit(const Cfg *Func) const {
   assert(getDest()->getType() == IceType_v8i16 ||
@@ skipping 16 matching lines @@
            TypeX8632Attributes[getDest()->getType()].PackString);
   emitTwoAddress(buf, this, Func);
 }
 
 void InstX8632Ret::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\tret\n";
 }
 
 void InstX8632Ret::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Asm->ret();
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Ret::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Type Ty = (getSrcSize() == 0 ? IceType_void : getSrc(0)->getType());
   Str << "ret." << Ty << " ";
   dumpSources(Func);
 }
 
 void InstX8632Xadd::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   if (Locked) {
     Str << "\tlock";
   }
   Str << "\txadd\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
 void InstX8632Xadd::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Type Ty = getSrc(0)->getType();
   const OperandX8632Mem *Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
+  assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
   const Variable *VarReg = llvm::cast<Variable>(getSrc(1));
   assert(VarReg->hasReg());
   const RegX8632::GPRRegister Reg =
       RegX8632::getEncodedGPR(VarReg->getRegNum());
   if (Locked) {
     Asm->lock();
   }
   Asm->xadd(Ty, Addr, Reg);
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Xadd::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   if (Locked) {
     Str << "lock ";
   }
   Type Ty = getSrc(0)->getType();
   Str << "xadd." << Ty << " ";
   dumpSources(Func);
 }
 
 void InstX8632Xchg::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   Str << "\txchg\t";
   getSrc(0)->emit(Func);
   Str << ", ";
   getSrc(1)->emit(Func);
   Str << "\n";
 }
 
 void InstX8632Xchg::emitIAS(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 2);
   x86::AssemblerX86 *Asm = Func->getAssembler<x86::AssemblerX86>();
   intptr_t StartPosition = Asm->GetPosition();
   Type Ty = getSrc(0)->getType();
   const OperandX8632Mem *Mem = llvm::cast<OperandX8632Mem>(getSrc(0));
+  assert(Mem->getSegmentRegister() == OperandX8632Mem::DefaultSegment);
   const x86::Address Addr = Mem->toAsmAddress(Asm);
   const Variable *VarReg = llvm::cast<Variable>(getSrc(1));
   assert(VarReg->hasReg());
   const RegX8632::GPRRegister Reg =
       RegX8632::getEncodedGPR(VarReg->getRegNum());
   Asm->xchg(Ty, Addr, Reg);
-  emitIASBytes(Str, Asm, StartPosition);
+  emitIASBytes(Func, Asm, StartPosition);
 }
 
 void InstX8632Xchg::dump(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrDump();
   Type Ty = getSrc(0)->getType();
   Str << "xchg." << Ty << " ";
   dumpSources(Func);
 }
 
 void OperandX8632Mem::emit(const Cfg *Func) const {
@@ skipping 86 matching lines @@
         Str << "+";
       Offset->dump(Func, Str);
     }
   } else {
     // There is only the offset.
     Offset->dump(Func, Str);
   }
   Str << "]";
 }
 
+void OperandX8632Mem::emitSegmentOverride(x86::AssemblerX86 *Asm) const {
+  if (SegmentReg != DefaultSegment) {
+    Asm->EmitSegmentOverride(InstX8632SegmentPrefixes[SegmentReg]);
+  }
+}
+
 x86::Address OperandX8632Mem::toAsmAddress(Assembler *Asm) const {
   int32_t Disp = 0;
   AssemblerFixup *Fixup = NULL;
   // Determine the offset (is it relocatable?)
   if (getOffset()) {
     if (ConstantInteger32 *CI =
             llvm::dyn_cast<ConstantInteger32>(getOffset())) {
       Disp = static_cast<int32_t>(CI->getValue());
     } else if (ConstantRelocatable *CR =
                    llvm::dyn_cast<ConstantRelocatable>(getOffset())) {
-      // TODO(jvoung): CR + non-zero-offset isn't really tested yet,
-      // since the addressing mode optimization doesn't try to combine
-      // ConstantRelocatable with something else.
-      assert(CR->getOffset() == 0);
       Fixup = x86::DisplacementRelocation::create(Asm, FK_Abs_4, CR);
     } else {
       llvm_unreachable("Unexpected offset type");
     }
   }
 
   // Now convert to the various possible forms.
   if (getBase() && getIndex()) {
     return x86::Address(RegX8632::getEncodedGPR(getBase()->getRegNum()),
                         RegX8632::getEncodedGPR(getIndex()->getRegNum()),
                         x86::ScaleFactor(getShift()), Disp);
   } else if (getBase()) {
     return x86::Address(RegX8632::getEncodedGPR(getBase()->getRegNum()), Disp);
   } else if (getIndex()) {
     return x86::Address(RegX8632::getEncodedGPR(getIndex()->getRegNum()),
                         x86::ScaleFactor(getShift()), Disp);
+  } else if (Fixup) {
+    // The fixup itself has an offset, so Disp should still be 0.
+    assert(Disp == 0);
+    return x86::Address::Absolute(Fixup);
   } else {
-    return x86::Address::Absolute(Disp, Fixup);
+    return x86::Address::Absolute(Disp);
   }
 }
 
+x86::Address VariableSplit::toAsmAddress(const Cfg *Func) const {
+  assert(!Var->hasReg());
+  const TargetLowering *Target = Func->getTarget();
+  int32_t Offset = Var->getStackOffset() + Target->getStackAdjustment();
+  if (Part == High)
+    Offset += 4;
+  return x86::Address(RegX8632::getEncodedGPR(Target->getFrameOrStackReg()),
+                      Offset);
+}
+
 void VariableSplit::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(!Var->hasReg());
   // The following is copied/adapted from TargetX8632::emitVariable().
   const TargetLowering *Target = Func->getTarget();
   const Type Ty = IceType_i32;
   Str << TypeX8632Attributes[Ty].WidthString << " ["
       << Target->getRegName(Target->getFrameOrStackReg(), Ty);
   int32_t Offset = Var->getStackOffset() + Target->getStackAdjustment();
   if (Part == High)
@@ skipping 20 matching lines @@
   }
   Str << "(";
   if (Func)
     Var->dump(Func);
   else
     Var->dump(Str);
   Str << ")";
 }
 
 } // end of namespace Ice