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Side by Side Diff: runtime/vm/assembler_x64.h

Issue 648613006: Implement bigint absAdd, absSub, mulAdd, sqrAdd, estQuotientDigit intrinsics, (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 6 years, 2 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #ifndef VM_ASSEMBLER_X64_H_ 5 #ifndef VM_ASSEMBLER_X64_H_
6 #define VM_ASSEMBLER_X64_H_ 6 #define VM_ASSEMBLER_X64_H_
7 7
8 #ifndef VM_ASSEMBLER_H_ 8 #ifndef VM_ASSEMBLER_H_
9 #error Do not include assembler_x64.h directly; use assembler.h instead. 9 #error Do not include assembler_x64.h directly; use assembler.h instead.
10 #endif 10 #endif
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539 void orq(Register dst, const Immediate& imm); 539 void orq(Register dst, const Immediate& imm);
540 void OrImmediate(Register dst, const Immediate& imm, Register pp); 540 void OrImmediate(Register dst, const Immediate& imm, Register pp);
541 541
542 void xorq(Register dst, Register src); 542 void xorq(Register dst, Register src);
543 void xorq(Register dst, const Address& address); 543 void xorq(Register dst, const Address& address);
544 void xorq(const Address& dst, Register src); 544 void xorq(const Address& dst, Register src);
545 void xorq(Register dst, const Immediate& imm); 545 void xorq(Register dst, const Immediate& imm);
546 void XorImmediate(Register dst, const Immediate& imm, Register pp); 546 void XorImmediate(Register dst, const Immediate& imm, Register pp);
547 547
548 void addl(Register dst, Register src); 548 void addl(Register dst, Register src);
549 void addl(const Address& address, const Immediate& imm); 549 void addl(Register dst, const Address& address);
550 void addl(const Address& address, Register src);
551 void adcl(Register dst, Register src);
552 void adcl(Register dst, const Immediate& imm);
553 void adcl(Register dst, const Address& address);
550 554
551 void addq(Register dst, Register src); 555 void addq(Register dst, Register src);
552 void addq(Register reg, const Immediate& imm); 556 void addq(Register dst, const Immediate& imm);
553 void addq(Register reg, const Address& address); 557 void addq(Register dst, const Address& address);
554 void addq(const Address& address, const Immediate& imm); 558 void addq(const Address& address, const Immediate& imm);
555 void addq(const Address& address, Register reg); 559 void addq(const Address& address, Register src);
556
557 void adcl(Register dst, Register src);
558
559 void subl(Register dst, Register src);
560 560
561 void cdq(); 561 void cdq();
562 void cqo(); 562 void cqo();
563 563
564 void idivl(Register reg); 564 void idivl(Register reg);
565 void divl(Register reg);
566
565 void idivq(Register reg); 567 void idivq(Register reg);
566 568
567 void imull(Register dst, Register src); 569 void imull(Register dst, Register src);
568 void imull(Register reg, const Immediate& imm); 570 void imull(Register reg, const Immediate& imm);
571 void mull(Register reg);
569 572
570 void imulq(Register dst, Register src); 573 void imulq(Register dst, Register src);
571 void imulq(Register dst, const Address& address); 574 void imulq(Register dst, const Address& address);
572 void imulq(Register dst, const Immediate& imm); 575 void imulq(Register dst, const Immediate& imm);
573 void MulImmediate(Register reg, const Immediate& imm, Register pp); 576 void MulImmediate(Register reg, const Immediate& imm, Register pp);
574 577
578 void subl(Register dst, Register src);
579 void subl(Register dst, const Address& address);
580 void sbbl(Register dst, Register src);
581 void sbbl(Register dst, const Immediate& imm);
582 void sbbl(Register dst, const Address& address);
583
575 void subq(Register dst, Register src); 584 void subq(Register dst, Register src);
576 void subq(Register reg, const Immediate& imm); 585 void subq(Register reg, const Immediate& imm);
577 void subq(Register reg, const Address& address); 586 void subq(Register reg, const Address& address);
578 void subq(const Address& address, Register reg); 587 void subq(const Address& address, Register reg);
579 void subq(const Address& address, const Immediate& imm); 588 void subq(const Address& address, const Immediate& imm);
580 589
581 void shll(Register reg, const Immediate& imm); 590 void shll(Register reg, const Immediate& imm);
582 void shll(Register operand, Register shifter); 591 void shll(Register operand, Register shifter);
583 void shrl(Register reg, const Immediate& imm); 592 void shrl(Register reg, const Immediate& imm);
584 void shrl(Register operand, Register shifter); 593 void shrl(Register operand, Register shifter);
585 void sarl(Register reg, const Immediate& imm); 594 void sarl(Register reg, const Immediate& imm);
586 void sarl(Register operand, Register shifter); 595 void sarl(Register operand, Register shifter);
596 void shldl(Register dst, Register src, const Immediate& imm);
587 597
588 void shlq(Register reg, const Immediate& imm); 598 void shlq(Register reg, const Immediate& imm);
589 void shlq(Register operand, Register shifter); 599 void shlq(Register operand, Register shifter);
590 void shrq(Register reg, const Immediate& imm); 600 void shrq(Register reg, const Immediate& imm);
591 void shrq(Register operand, Register shifter); 601 void shrq(Register operand, Register shifter);
592 void sarq(Register reg, const Immediate& imm); 602 void sarq(Register reg, const Immediate& imm);
593 void sarq(Register operand, Register shifter); 603 void sarq(Register operand, Register shifter);
594 604
595 void incl(const Address& address); 605 void incl(const Address& address);
596 void decl(const Address& address); 606 void decl(const Address& address);
(...skipping 429 matching lines...) Expand 10 before | Expand all | Expand 10 after
1026 Patchability patchable, 1036 Patchability patchable,
1027 Register pp); 1037 Register pp);
1028 bool CanLoadFromObjectPool(const Object& object); 1038 bool CanLoadFromObjectPool(const Object& object);
1029 void LoadWordFromPoolOffset(Register dst, Register pp, int32_t offset); 1039 void LoadWordFromPoolOffset(Register dst, Register pp, int32_t offset);
1030 1040
1031 inline void EmitUint8(uint8_t value); 1041 inline void EmitUint8(uint8_t value);
1032 inline void EmitInt32(int32_t value); 1042 inline void EmitInt32(int32_t value);
1033 inline void EmitInt64(int64_t value); 1043 inline void EmitInt64(int64_t value);
1034 1044
1035 inline void EmitRegisterREX(Register reg, uint8_t rex); 1045 inline void EmitRegisterREX(Register reg, uint8_t rex);
1036 inline void EmitRegisterOperand(int rm, int reg);
1037 inline void EmitOperandREX(int rm, const Operand& operand, uint8_t rex); 1046 inline void EmitOperandREX(int rm, const Operand& operand, uint8_t rex);
1038 inline void EmitXmmRegisterOperand(int rm, XmmRegister reg); 1047 inline void EmitXmmRegisterOperand(int rm, XmmRegister reg);
1039 inline void EmitFixup(AssemblerFixup* fixup); 1048 inline void EmitFixup(AssemblerFixup* fixup);
1040 inline void EmitOperandSizeOverride(); 1049 inline void EmitOperandSizeOverride();
1041 inline void EmitREX_RB(XmmRegister reg, 1050 inline void EmitREX_RB(XmmRegister reg,
1042 XmmRegister base, 1051 XmmRegister base,
1043 uint8_t rex = REX_NONE); 1052 uint8_t rex = REX_NONE);
1044 inline void EmitREX_RB(XmmRegister reg, 1053 inline void EmitREX_RB(XmmRegister reg,
1045 const Operand& operand, 1054 const Operand& operand,
1046 uint8_t rex = REX_NONE); 1055 uint8_t rex = REX_NONE);
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1147 } 1156 }
1148 1157
1149 1158
1150 inline void Assembler::EmitOperandSizeOverride() { 1159 inline void Assembler::EmitOperandSizeOverride() {
1151 EmitUint8(0x66); 1160 EmitUint8(0x66);
1152 } 1161 }
1153 1162
1154 } // namespace dart 1163 } // namespace dart
1155 1164
1156 #endif // VM_ASSEMBLER_X64_H_ 1165 #endif // VM_ASSEMBLER_X64_H_
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