Implement bigint absAdd, absSub, mulAdd, sqrAdd, estQuotientDigit intrinsics,

runtime/vm/assembler_x64_test.cc

 // Copyright (c) 2012, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_X64)
 
 #include "vm/assembler.h"
 #include "vm/os.h"
 #include "vm/unit_test.h"
@@ skipping 368 matching lines @@
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(SignedMultiply, test) {
   typedef int (*SignedMultiply)();
   EXPECT_EQ(8000, reinterpret_cast<SignedMultiply>(test->entry())());
 }
 
 
+ASSEMBLER_TEST_GENERATE(UnsignedMultiply, assembler) {
+  __ movl(RAX, Immediate(-1));
+  __ movl(RCX, Immediate(16));
+  __ mull(RCX);

[zra, 2014/10/10 16:23:43]

A comment about what is going on here might be good since 15 is sort of
non-intuitive as the expected result.

[regis, 2014/10/10 19:15:47]

Done.

+  __ movq(RAX, RDX);
+  __ ret();
+}
+
+
+ASSEMBLER_TEST_RUN(UnsignedMultiply, test) {
+  typedef int (*UnsignedMultiply)();
+  EXPECT_EQ(15, reinterpret_cast<UnsignedMultiply>(test->entry())());
+}
+
+
 ASSEMBLER_TEST_GENERATE(SignedMultiply64, assembler) {
   __ pushq(R15);  // Callee saved.
   __ movq(RAX, Immediate(2));
   __ movq(RCX, Immediate(4));
   __ imulq(RAX, RCX);
 
   __ movq(R8, Immediate(2));
   __ movq(R9, Immediate(4));
   __ pushq(R9);
   __ imulq(R8, Address(RSP, 0));
@@ skipping 102 matching lines @@
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(SignedDivide, test) {
   typedef int32_t (*SignedDivide)();
   EXPECT_EQ(-87 / 42, reinterpret_cast<SignedDivide>(test->entry())());
 }
 
 
+ASSEMBLER_TEST_GENERATE(UnsignedDivide, assembler) {
+  __ movl(RAX, Immediate(0x0));
+  __ movl(RDX, Immediate(0xfffffffff0000000));

[zra, 2014/10/10 16:23:43]

movq? Can you really give such a big immediate to movl? Does it set only the low
32-bits of RDX? If so why not get rid of the high bits of the immediate?

[regis, 2014/10/10 19:15:47]

If you do not specify the high bits, the value is positive instead of negative
and you get an assert fault !imm.is_int32()

I declared some locals to make it more readable.

+  __ movl(RCX, Immediate(-1));
+  __ divl(RCX);

[zra, 2014/10/10 16:23:43]

A comment here too.

[regis, 2014/10/10 19:15:47]

ditto

+  __ ret();
+}
+
+
+ASSEMBLER_TEST_RUN(UnsignedDivide, test) {
+  typedef uint32_t (*UnsignedDivide)();
+  EXPECT_EQ(0xF0000000, reinterpret_cast<UnsignedDivide>(test->entry())());
+}
+
+
 ASSEMBLER_TEST_GENERATE(SignedDivideLong, assembler) {
   __ movq(RAX, Immediate(kLargeConstant));
   __ movq(RDX, Immediate(123));
   __ cqo();  // Clear RDX.
   __ movq(RCX, Immediate(42));
   __ idivq(RCX);
   __ ret();
 }
 
 
@@ skipping 377 matching lines @@
   __ movl(RCX, Immediate(3));
   __ shlq(RAX, Immediate(31));
   __ sarl(RAX, RCX);
   __ cmpl(RAX, Immediate(0xfffffffff0000000));
   __ j(EQUAL, &donetest13a);
   // Be sure to skip this crashing code.
   __ movl(RAX, Immediate(0));
   __ movl(Address(RAX, 0), RAX);
   __ Bind(&donetest13a);
 
+  Label donetest15a;
+  __ movl(RDX, Immediate(0xffffffffff000000));

[zra, 2014/10/10 16:23:43]

Same question in the sequence with l vs. q versions of instructions with large
immediates.

[regis, 2014/10/10 19:15:47]

ditto

+  __ movl(RAX, Immediate(-1));
+  __ movl(RCX, Immediate(2));
+  __ shll(RDX, RCX);
+  __ shldl(RDX, RAX, Immediate(2));

[zra, 2014/10/10 16:23:43]

A comment here.

[regis, 2014/10/10 19:15:47]

Done.

+  __ cmpl(RDX, Immediate(0xfffffffff0000003));
+  __ j(EQUAL, &donetest15a);
+  __ int3();
+  __ Bind(&donetest15a);
+
   __ movl(RAX, Immediate(0));
   __ ret();
 }
 
 
 ASSEMBLER_TEST_RUN(LogicalOps, test) {
   typedef int (*LogicalOpsCode)();
   EXPECT_EQ(0, reinterpret_cast<LogicalOpsCode>(test->entry())());
 }
 
@@ skipping 2108 matching lines @@
   int res = reinterpret_cast<ConditionalMovesNoOverflowCode>(
       test->entry())(0x7fffffffffffffff, 2);
   EXPECT_EQ(1, res);
   res = reinterpret_cast<ConditionalMovesNoOverflowCode>(test->entry())(1, 1);
   EXPECT_EQ(0, res);
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_X64