[arm] Add support for SMMLA, SMMLS and SMMUL.

test/cctest/test-disasm-arm.cc

 // Copyright 2011 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 402 matching lines @@
     COMPARE(uxtb(r9, Operand(r10, ROR, 0)),
             "e6ef907a       uxtb r9, r10");
     COMPARE(uxtb(r3, Operand(r4, ROR, 8)),
             "e6ef3474       uxtb r3, r4, ror #8");
     COMPARE(uxtab(r3, r4, Operand(r5, ROR, 8)),
             "e6e43475       uxtab r3, r4, r5, ror #8");
     COMPARE(uxtb16(r3, Operand(r4, ROR, 8)),
             "e6cf3474       uxtb16 r3, r4, ror #8");
   }
 
+  COMPARE(smmls(r0, r1, r2, r3), "e75032d1       smmls r0, r1, r2, r3");
+  COMPARE(smmls(r10, r9, r8, r7), "e75a78d9       smmls r10, r9, r8, r7");
+
+  COMPARE(smmla(r0, r1, r2, r3), "e7503211       smmla r0, r1, r2, r3");
+  COMPARE(smmla(r10, r9, r8, r7), "e75a7819       smmla r10, r9, r8, r7");
+
+  COMPARE(smmul(r0, r1, r2), "e750f211       smmul r0, r1, r2");
+  COMPARE(smmul(r8, r9, r10), "e758fa19       smmul r8, r9, r10");
+
   VERIFY_RUN();
 }
 
 
 
 TEST(Vfp) {
   SET_UP();
 
   if (CpuFeatures::IsSupported(VFP3)) {
     CpuFeatureScope scope(&assm, VFP3);
@@ skipping 464 matching lines @@
             "e16dc7ff       strd ip, [sp, #-127]!");
 
     COMPARE(pld(MemOperand(r1, 0)),
             "f5d1f000       pld [r1]");
     COMPARE(pld(MemOperand(r2, 128)),
             "f5d2f080       pld [r2, #+128]");
   }
 
   VERIFY_RUN();
 }